DF2160BVTE10 Renesas Electronics America, DF2160BVTE10 Datasheet - Page 489

• Manufacturer Part Number: DF2160BVTE10
• Description: IC H8S MCU FLASH 64K 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2160BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2160BVTE10; HD64F2160BVTE10

Bit Bit Name
3
2
AL
AAS
Initial Value R/W
0
0
R/(W) * Arbitration Lost Flag
R/(W) * Slave Address Recognition Flag
Description
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL = 0
When ALSL = 1
[Clearing conditions]
In I
the first frame following a start condition matches bits SVA6
to SVA0 in SAR, or if the general call address (H'00) is
detected.
[Setting condition]
When the slave address or general call address (one frame
including a R/W bit is H'00) is detected in slave receive
mode and FS = 0 in SAR
[Clearing conditions]
2
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the internal SCL line is high at the fall of SCL in
master transmit mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the SDA pin is driven low by another device before
the I
start condition instruction was executed in master
transmit mode
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AL after reading AL = 1
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AAS after reading AAS = 1
In master mode
C bus format slave receive mode, this flag is set to 1 if
2
C bus interface drives the SDA pin low, after the
Section 16 I
Rev. 3.00 Mar 21, 2006 page 433 of 788
2
C Bus Interface (IIC) (Optional)
REJ09B0300-0300