HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 245

• Manufacturer Part Number: HD6417034AFI20V
• Description: MCU 5V 0K I-TEMP PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.4
9.4.1
In the following example, data is transferred from on-chip RAM to a memory-mapped external
device with an input capture A/compare match A interrupt (IMIA0) from channel 0 of the 16-bit
integrated timer pulse unit (ITU) as the transfer request signal. The transfer is performed by
DMAC channel 3. Table 9.7 shows the transfer conditions and register values.
Table 9.7
Transfer Conditions
Transfer source: on-chip RAM
Transfer destination: memory-mapped external device
Number of transfers: 8
Transfer destination address: fixed
Transfer source address: incremented
Transfer request source (transfer request signal): ITU channel
0 (IMIA0)
Bus mode: cycle-steal
Transfer unit: byte
DEI interrupt request generated at end of transfer (channel 3
enabled for transfer)
Channel priority order: fixed (0 > 3 > 2 > 1) (all channels
enabled for transfer)
Examples of Use
DMA Transfer between On-Chip RAM and Memory-Mapped External Device
Transfer Conditions and Register Settings for Transfer Between On-Chip RAM
and Memory-Mapped External Device
Section 9 Direct Memory Access Controller (DMAC)
Rev. 7.00 Jan 31, 2006 page 217 of 658
SAR3
DAR3
CHCR3
DMAOR
Register
TCR3
Setting
H'FFFFE00
Destination address
H'0008
H'1805
H'0001
REJ09B0272-0700