HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 53

MCU 5V 0K I-TEMP PB-FREE 112-QFP

HD6417034AFI20V

Manufacturer Part Number
HD6417034AFI20V
Description
MCU 5V 0K I-TEMP PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417034AFI20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417034AFI20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Addressing
Mode
Indirect
register
addressing
with
displace-
ment
Indirect
indexed
register
addressing
Indirect
GBR
addressing
with
displace-
ment
Indirect
indexed
GBR
addressing
Mnemonic
Expression
@(disp:4, Rn)
@(R0, Rn)
@(disp:8,
GBR)
@(R0, GBR)
Effective Addresses Calculation
The effective address is Rn plus a 4-bit
displacement (disp). disp is zero-extended, and
remains the same for a byte operation, is doubled
for a word operation, and is quadrupled for a
longword operation.
The effective address is the GBR value plus an 8-
bit displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
The effective address is the GBR value plus the R0
value.
(zero-extended)
(zero-extended)
GBR
1/2/4
1/2/4
GBR
disp
disp
Rn
R0
R0
Rn
+
+
+
+
Rev. 7.00 Jan 31, 2006 page 25 of 658
Rn + disp
+ disp
GBR + R0
Rn + R0
GBR
1/2/4
1/2/4
REJ09B0272-0700
Section 2 CPU
Equation
Byte: Rn +
disp
Word: Rn +
disp
Longword:
Rn + disp
Rn + R0
Byte: GBR +
disp
Word: GBR +
disp
Longword:
GBR + disp
4
GBR + R0
2
2
4

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