DF2377RVFQ33W Renesas Electronics America, DF2377RVFQ33W Datasheet - Page 864

• Manufacturer Part Number: DF2377RVFQ33W
• Description: IC H8S MCU FLASH 3V 384K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2377RVFQ33W

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 16 I
16.4.6
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.4.7
Flowcharts in respective modes that use the I
Rev.7.00 Mar. 18, 2009 page 796 of 1136
REJ09B0109-0700
SCL or SDA
input signal
Sampling
clock
Noise Canceler
Example of Use
2
C Bus Interface 2 (IIC2) (Option)
Figure 16.13 Block Diagram of Noise Canceler
Sampling clock
D
System clock
period
Latch
C
Q
D
2
C bus interface are shown in figures 16.14 to 16.17.
Latch
C
Q
March detector
SCL or SDA
Internal
signal