UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 185

• Manufacturer Part Number: UPD78F9222CS-CAC-A
• Description: MCU 8BIT 4KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9222CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark LIN stands for Local Interconnect Network and is a low-speed (1 to 20 kbps) serial communication
Notes 1.
Remark The interval between each field is controlled by software.
LIN bus
(output)
INTST6
Figures 11-1 and 11-2 outline the transmission and reception operations of LIN.
TxD6
2.
3.
Note 3
protocol intended to aid the cost reduction of an automotive network.
LIN communication is single-master communication, and up to 15 slaves can be connected to one
master.
The LIN slaves are used to control the switches, actuators, and sensors, and these are connected to the
LIN master via the LIN network.
Normally, the LIN master is connected to a network such as CAN (Controller Area Network).
In addition, the LIN bus uses a single-wire method and is connected to the nodes via a transceiver that
complies with ISO9141.
In the LIN protocol, the master transmits a frame with baud rate information and the slave receives it and
corrects the baud rate error. Therefore, communication is possible when the baud rate error in the slave
is 15% or less.
The wakeup signal frame is substituted by 80H transmission in the 8-bit mode.
The synchronous break field is output by hardware. The output width is equal to the bit length set by
bits 4 to 2 (SBL62 to SBL60) of asynchronous serial interface control register 6 (ASICL6) (see 11.4.2
(2) (h) SBF transmission).
INTST6 is output on completion of each transmission. It is also output when SBF is transmitted.
signal frame
8 bits
Wakeup
Note 1
13-bit
Figure 11-1. LIN Transmission Operation
Synchronous
transmission
CHAPTER 11 SERIAL INTERFACE UART6
break field
Note 2
SBF
User’s Manual U16898EJ6V0UD
Synchronous
transmission
field
55H
transmission
Identifier
Data
field
transmission
Data field
Data
transmission
Data field Checksum
Data
transmission
field
Data
183