UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 259

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UPD78F9222CS-CAC-A

Manufacturer Part Number
UPD78F9222CS-CAC-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9222CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
(2) Low-voltage detection level select register (LVIS)
This register selects the low-voltage detection level.
This register can be set by an 8-bit memory manipulation instruction.
Reset input clears this register to 00H
Address: FF51H, After reset: 00H
Symbol
LVIS
Note For a reset by LVI, the value of LVIM is not initialized.
Cautions 1. Bits 4 to 7 must be set to 0.
LVIS3
Figure 16-3. Format of Low-Voltage Detection Level Select Register (LVIS)
7
0
0
0
0
0
0
0
0
0
1
1
2. If values other than same values are written during LVI operation, the value
becomes undefined at the very moment it is written, and thus be sure to stop LVI
(bit 7 of LVIM register (LVION) = 0) before writing.
LVIS2
Other than above
6
0
0
0
0
0
1
1
1
1
0
0
Note
R/W
CHAPTER 16 LOW-VOLTAGE DETECTOR
Note
LVIS1
.
5
0
0
0
1
1
0
0
1
1
0
0
User’s Manual U16898EJ6V0UD
LVIS0
4
0
0
1
0
1
0
1
0
1
0
1
V
V
V
V
V
V
V
V
V
V
Setting prohibited
LVI0
LVI1
LVI2
LVI3
LVI4
LVI5
LVI6
LVI7
LVI8
LVI9
LVIS3
(4.3 V ±0.2 V)
(4.1 V ±0.2 V)
(3.9 V ±0.2 V)
(3.7 V ±0.2 V)
(3.5 V ±0.2 V)
(3.3 V ±0.15 V)
(3.1 V ±0.15 V)
(2.85 V ±0.15 V)
(2.6 V ±0.1 V)
(2.35 V ±0.1 V)
3
LVIS2
2
Detection level
LVIS1
1
LVIS0
0
257

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