UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 291

• Manufacturer Part Number: UPD70F3769GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3769GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Remark
Figure 7-38. Software Processing Flow in Free-Running Timer Mode (Capture Function) (2/2)
n = 0 to 3, 5
<3> Count operation stop flow
<1> Count operation start flow
<2> Overflow flag clear flow
(TAAnCKS0 to TAAnCKS2 bits),
TAAnOVF bit (CLR TAAnOVF).
Execute instruction to clear
Read TAAnOPT0 register
Register initial setting
(check overflow flag).
TAAnCTL1 register,
TAAnIOC1 register,
TAAnOPT0 register
TAAnCTL0 register
TAAnOVF bit = 1
TAAnCE bit = 1
TAAnCE bit = 0
START
STOP
YES
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
NO
Counter is initialized and
counting is stopped by
clearing TAAnCE bit to 0.
Initial setting of these registers
is performed before setting the
TAAnCE bit to 1.
The TAAnCKS0 to TAAnCKS2 bits can
be set at the same time when counting
has been started (TAAnCE bit = 1).
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