AT91R40807-33AI Atmel, AT91R40807-33AI Datasheet - Page 125

• Manufacturer Part Number: AT91R40807-33AI
• Description: IC ARM7 MCU 176 TQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91R40807-33AI

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Timer Counter Operating
Modes
Trigger
1354D–ATARM–08/02
Figure 45. Clock Control
Each Timer Counter channel can independently operate in two different modes:
•
•
The Timer Counter Operating Mode is programmed with the WAVE bit in the TC Mode
Register. In Capture Mode, TIOA and TIOB are configured as inputs. In Waveform
Mode, TIOA is always configured to be an output and TIOB is an output if it is not
selected to be the external trigger.
A trigger resets the counter and starts the counter clock. Three types of triggers are
common to both modes, and a fourth external trigger is available to each mode.
The following triggers are common to both modes:
•
•
•
The Timer Counter channel can also be configured to have an external trigger. In Cap-
ture Mode, the external trigger signal can be selected between TIOA and TIOB. In
Waveform Mode, an external event can be programmed on one of the following signals:
TIOB, XC0, XC1 or XC2. This external event can then be programmed to perform a trig-
ger by setting ENETRG in TC_CMR.
If an external trigger is used, the duration of the pulses must be longer than the system
clock (MCK) period in order to be detected.
Whatever the trigger used, it will be taken into account at the following active edge of the
selected clock. This means that the counter value may not read zero just after a trigger,
especially when a low frequency signal is selected as the clock.
Capture Mode allows measurement on signals
Waveform Mode allows wave generation
Software Trigger: Each channel has a software trigger, available by setting SWTRG
in TC_CCR.
SYNC: Each channel has a synchronization signal SYNC. When asserted, this
signal has the same effect as a software trigger. The SYNC signals of all channels
are asserted simultaneously by writing TC_BCR (Block Control) with SYNC set.
Compare RC Trigger: RC is implemented in each channel and can provide a trigger
when the counter value matches the RC value if CPCTRG is set in TC_CMR.
Selected
Counter
Clock
Clock
Q
R
S
Trigger
CLKSTA
Q
CLKEN
R
S
AT91X40 Series
Event
Stop
CLKDIS
Disable
Event
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