AT91R40807-33AI Atmel, AT91R40807-33AI Datasheet - Page 50

IC ARM7 MCU 176 TQFP

AT91R40807-33AI

Manufacturer Part Number
AT91R40807-33AI
Description
IC ARM7 MCU 176 TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91R40807-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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PS: Power-saving
Peripheral Clocks
50
AT91X40 Series
The AT91X40 Series’ Power-saving feature enables optimization of power consumption.
The PS controls the CPU and Peripheral Clocks. One control register (PS_CR) enables
the user to stop the ARM7TDMI Clock and enter Idle Mode. One set of registers with a
set/clear mechanism enables and disables the peripheral clocks individually.
The ARM7TDMI clock is enabled after a reset and is automatically re-enabled by any
enabled interrupt in the Idle Mode.
The clock of each peripheral integrated in the AT91X40 Series can be individually
enabled and disabled by writing to the Peripheral Clock Enable (PS_PCER) and Periph-
eral Clock Disable Registers (PS_PCDR). The status of the peripheral clocks can be
read in the Peripheral Clock Status Register (PS_PCSR).
When a peripheral clock is disabled, the clock is immediately stopped. When the clock is
re-enabled, the peripheral resumes action where it left off.
To avoid data corruption or erroneous behavior of the system, the system software only
disables the clock after all programmed peripheral operations have finished.
The peripheral clocks are automatically enabled after a reset.
The bits that control the peripheral clocks are the same as those that control the Inter-
rupt Sources in the AIC.
1354D–ATARM–08/02

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