PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 101
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 101 of 366
- Download datasheet (7Mb)
8.7
PORTG is a 5-bit wide, bi-directional port. The corre-
sponding Data Direction register is TRISG. Setting a
TRISG bit (=1) will make the corresponding PORTG pin
an input (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISG bit (=0) will
make the corresponding PORTG pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATG register
read and write the latched output value for PORTG.
Pins RG0-RG2 on PORTG are multiplexed with the
CAN peripheral. Refer to "CAN Module", Section 17.0
for proper settings of TRISG when CAN is enabled.
FIGURE 8-12: RG0/CANTX0 PIN BLOCK DIAGRAM
2000 Microchip Technology Inc.
Note:
Data Bus
WR PORTG or
WR LATG
WR TRISG
RD TRISG
RD PORTG
PORTG, LATG, and TRISG Registers
TXD
I/O pins have diode protection to V
TRIS Latch
Data
RD LATG
D
D
CK
CK
Latch
Q
Q
Q
Q
DD
Advanced Information
and V
SS
.
0
1
OPMODE2:OPMODE0 = 000
EXAMPLE 8-7:
CLRF
CLRF
MOVLW
MOVWF
Q
PORTG
LATG
0x04
TRISG
EN
EN
D
V
V
P
N
INITIALIZING PORTG
SS
DD
; Initialize PORTG by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RG1:RG0 as outputs
; RG2 as input
; RG4:RG3 as outputs
PIC18CXX8
ENDRHI
OPMODE2:OPMODE0=000
Schmitt
Trigger
DS30475A-page 101
I/O Pin
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