PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 104
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 104 of 366
- Download datasheet (7Mb)
PIC18CXX8
8.8
PORTH is a 5-bit wide, bi-directional port available only
on the PIC18C858 devices. The corresponding Data
Direction register is TRISH. Setting a TRISH bit (=1)
will make the corresponding PORTH pin an input (i.e.,
put the corresponding output driver in a hi-impedance
mode). Clearing a TRISH bit (=0) will make the corre-
sponding PORTH pin an output (i.e., put the contents
of the output latch on the selected pin).
Read-modify-write operations on the LATH register
read and write the latched output value for PORTH.
Pins RH0-RH3 on the PIC18C858 are bi-directional I/O
pins with ST input buffers. Pins RH4-RH7 on all devices
are multiplexed with A/D converter inputs.
FIGURE 8-16: RH3:RH0 PINS BLOCK
DS30475A-page 104
WR TRISH
WR LATH
or
WR PORTH
Data Bus
Note:
Note:
Note:
PORTH, LATH, and TRISH Registers
I/O pins have diode protection to V
This port is available on PIC18C858.
On a Power-on Reset, the RH7:RH4 pins
are configured as inputs and read as ’0’.
RD
PORTH
TRIS Latch
Data Latch
D
D
CK
CK
RD LATH
RD TRISH
DIAGRAM
Q
Q
Q
Q
Q
EN
D
DD
Schmitt
Trigger
and V
Advanced Information
V
V
N
P
SS
DD
SS
.
I/O Pin
EXAMPLE 8-8:
FIGURE 8-17: RH7:RH4 PINS BLOCK
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
WR TRISH
WR LATH
or
WR PORTH
Note:
Data
Bus
RD PORTH
To A/D Converter
PORTH
LATH
0x0F
ADCON1
0xCF
TRISH
I/O pins have diode protection to V
D
D
Data Latch
TRIS Latch
CK
CK
DIAGRAM
INITIALIZING PORTH
RD LATH
; Initialize PORTH by
; Alternate method
;
;
; RH5:RH4 as outputs
; RH7:RH6 as inputs
; clearing output
; data latches
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
RD TRISH
Q
Q
Q
Q
2000 Microchip Technology Inc.
Q
Analog
Input
Mode
EN
D
DD
V
V
P
N
DD
SS
and V
SS
I/O Pin
ST
Input
Buffer
.
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