PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 185
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 185 of 366
- Download datasheet (7Mb)
17.2
There are many registers associated with the CAN
module. Descriptions of these registers are grouped
into sections. These sections are:
• Control and Status Registers
• Transmit Buffer Registers
• Receive Buffer Registers
• Baud Rate Control Registers
• Interrupt Status and Control Registers
REGISTER 17-1:
Note:
2000 Microchip Technology Inc.
bit 7-5
bit 4
bit 3-1
bit 0
Control Registers for the CAN Module
Not all CAN registers are available in the
access bank.
CANCON – CAN CONTROL REGISTER
bit 7
REQOP2:REQOP0: Request CAN Operation Mode bits
1xx = Request Configuration mode
011 = Request Listen Only mode
010 = Request Loopback mode
001 = Request Disable mode
000 = Request Normal mode
ABAT: Abort All Pending Transmissions bit
1 = Abort all pending transmissions (in all transmit buffers)
0 = Transmissions proceeding as normal
WIN2:WIN0: Window Address bits
This selects which of the CAN buffers to switch into the access bank area. This allows access
to the buffer registers from any data memory bank. After a frame has caused an interrupt, the
ICODE2:ICODE0 bits can be copied to the WIN2:WIN0 bits to select the correct buffer. See
Example 17-1 for code example.
111 = Receive Buffer 0
110 = Receive Buffer 0
101 = Receive Buffer 1
100 = Transmit Buffer 0
011 = Transmit Buffer 1
010 = Transmit Buffer 2
001 = Receive Buffer 0
000 = Receive Buffer 0
Unimplemented: Read as ’0’
Legend:
R = Readable bit
- n = Value at POR
REQOP2
R/W-1
REQOP1
R/W-0
Advanced Information
W = Writable bit
’1’ = Bit is set
REQOP0
R/W-0
R/W-0
ABAT
17.2.1
This section shows the CAN Control and Status
registers.
CAN CONTROL AND STATUS REGISTERS
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
WIN2
R/W-0
WIN1
PIC18CXX8
x = Bit is unknown
R/W-0
WIN0
DS30475A-page 185
U-0
—
bit 0
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