ATMEGA323L-4AI Atmel, ATMEGA323L-4AI Datasheet - Page 166

• Manufacturer Part Number: ATMEGA323L-4AI
• Description: IC AVR MCU 32K LV 4MZ IND 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323L-4AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA323L4AI

Reset Register
Boundary-Scan Chain
Boundary-Scan Specific
JTAG Instructions
EXTEST; $0
166
ATmega323(L)
The Reset Register is a Test Data Register used to reset the part. Since the AVR tri-
states Port Pins when reset, the Reset Register can also replace the function of the
unimplemented optional JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the external Reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-
Out Period (refer to Table 6 on page 27) after releasing the Reset Register. The output
from this Data Register is not latched, so the reset will take place immediately, as shown
in Figure 88.
Figure 88. Reset Register
The Boundary-Scan Chain has the capability of driving and observing the logic levels on
the digital I/O pins.
See “Boundary-Scan Chain” on page 168 for a complete description.
The Instruction Register is four bit wide, supporting up to 16 instructions. Listed below
are the JTAG instructions useful for Boundary-Scan operation. Note that the optional
HIGHZ instruction is not implemented, but all outputs with tri-state capability can be set
in high-impedant state by using the AVR_RESET instruction, since the initial state for all
port pins is tri-state.
As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.
The OPCODE for each instruction is shown behind the instruction name in hex format.
The text describes which Data Register is selected as path between TDI and TDO for
each instruction.
Mandatory JTAG instruction for selecting the Boundary-Scan Chain as Data Register for
testing circuitry external to the AVR package. For port-pins, Pull-up Disable, Output
Control, Output Data, and Input Data are all accessible in the scan chain. For Analog cir-
cuits having Off-chip connections, the interface between the analog and the digital logic
is in the scan chain. The contents of the latched outputs of the Boundary-Scan chain is
driven out as soon as the JTAG IR-Register is loaded by the EXTEST instruction.
The active states are:
•
•
Capture-DR: Data on the external pins are sampled into the Boundary-Scan Chain.
Shift-DR: The Internal Scan Chain is shifted by the TCK input.
From other internal and
external reset sources
ClockDR · AVR_RESET
From
TDI
D
Q
TDO
To
Internal reset
1457G–AVR–09/03