ATMEGA323L-4AI Atmel, ATMEGA323L-4AI Datasheet - Page 5
![IC AVR MCU 32K LV 4MZ IND 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323L-4AI
Manufacturer Part Number
ATMEGA323L-4AI
Description
IC AVR MCU 32K LV 4MZ IND 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323L-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA323L4AI
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Port B (PB7..PB0)
Port C (PC7..PC0)
Port D (PD7..PD0)
RESET
XTAL1
XTAL2
AVCC
AREF
AGND
1457G–AVR–09/03
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally
pulled low will source current if the pull-up resistors are activated. The Port B pins are
tri-stated when a reset condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega323 as listed
on page 139.
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally
pulled low will source current if the pull-up resistors are activated. The Port C pins are
tri-stated when a reset condition becomes active, even if the clock is not running.
Port C also serves the functions of the JTAG interface and other special features of the
ATmega323 as listed on page 146. If the JTAG interface is enabled, the pull-up resistors
on pins PC5 (TDI), PC3 (TMS) and PC2 (TCK) will be activated even if a Reset occurs.
Port D is an 8-bit bidirectional I/O port with internal pull-up resistors (selected for each
bit). The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally
pulled low will source current if the pull-up resistors are activated. The Port D pins are
tri-stated when a reset condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATmega323 as listed
on page 151.
Reset input. A low level on this pin for more than 500 ns will generate a Reset, even if
the clock is not running. Shorter pulses are not guaranteed to generate a Reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally
connected to V
nected to V
ADC.
AREF is the analog reference pin for the A/D Converter. For ADC operations, a voltage
in the range 2.56V to AVCC can be applied to this pin.
Analog ground. If the board has a separate analog ground plane, this pin should be con-
nected to this ground plane. Otherwise, connect to GND.
CC
through a low-pass filter. See page 127 for details on operation of the
CC
, even if the ADC is not used. If the ADC is used, it should be con-
ATmega323(L)
5
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