ATMEGA8535L-8JI Atmel, ATMEGA8535L-8JI Datasheet - Page 12
![IC AVR MCU 8K LV 8MHZ IND 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8535L-8JI
Manufacturer Part Number
ATMEGA8535L-8JI
Description
IC AVR MCU 8K LV 8MHZ IND 44PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535L-8JI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8535L-8JI
Manufacturer:
TI
Quantity:
5 000
Part Number:
ATMEGA8535L-8JI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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The X-register, Y-register, and
Z-register
Stack Pointer
12
ATmega8535(L)
The registers R26..R31 have some added functions to their general purpose usage.
These registers are 16-bit address pointers for indirect addressing of the Data Space.
The three indirect address registers X, Y, and Z are defined as described in Figure 5.
Figure 5. The X-, Y-, and Z-registers
In the different addressing modes, these address registers have functions as fixed dis-
placement, automatic increment, and automatic decrement (see the instruction set
reference for details).
The Stack is mainly used for storing temporary data, for storing local variables and for
storing return addresses after interrupts and subroutine calls. The Stack Pointer Regis-
ter always points to the top of the Stack. Note that the Stack is implemented as growing
from higher memory locations to lower memory locations. This implies that a Stack
PUSH command decreases the Stack Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Inter-
rupt Stacks are located. This Stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above 0x60. The Stack Pointer is decremented by one
when data is pushed onto the Stack with the PUSH instruction, and it is decremented by
two when the return address is pushed onto the Stack with subroutine call or interrupt.
The Stack Pointer is incremented by one when data is popped from the Stack with the
POP instruction, and it is incremented by two when data is popped from the Stack with
return from subroutine RET or return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The num-
ber of bits actually used is implementation dependent. Note that the data space in some
implementations of the AVR architecture is so small that only SPL is needed. In this
case, the SPH Register will not be present.
X-register
Y-register
Z-register
Bit
Read/Write
Initial Value
SP7
R/W
R/W
15
7
0
0
-
15
7
15
7
15
7
SP6
R/W
R/W
14
6
0
0
-
R27 (0x1B)
R29 (0x1D)
R31 (0x1F)
SP5
R/W
R/W
13
5
0
0
-
XH
YH
ZH
0
SP4
R/W
R/W
12
4
0
0
-
SP3
R/W
R/W
11
3
0
0
-
0
0
7
7
7
R/W
R/W
SP2
10
2
0
0
-
R/W
R/W
SP9
SP1
R26 (0x1A)
R28 (0x1C)
R30 (0x1E)
9
1
0
0
XL
YL
ZL
0
R/W
R/W
SP8
SP0
2502K–AVR–10/06
8
0
0
0
SPH
SPL
0
0
0
0
0
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