ATMEGA8535L-8JI Atmel, ATMEGA8535L-8JI Datasheet - Page 193
![IC AVR MCU 8K LV 8MHZ IND 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8535L-8JI
Manufacturer Part Number
ATMEGA8535L-8JI
Description
IC AVR MCU 8K LV 8MHZ IND 44PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535L-8JI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8535L-8JI
Manufacturer:
TI
Quantity:
5 000
Part Number:
ATMEGA8535L-8JI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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Table 76. Status Codes for Master Receiver Mode
2502K–AVR–10/06
Status Code
(TWSR)
Prescaler Bits
are 0
0x08
0x10
0x38
0x40
0x48
0x50
0x58
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face Hardware
A START condition has been
transmitted
A repeated START condition
has been transmitted
Arbitration lost in SLA+R or NOT
ACK bit
SLA+R has been transmitted;
ACK has been received
SLA+R has been transmitted;
NOT ACK has been received
Data byte has been received;
ACK has been returned
Data byte has been received;
NOT ACK has been returned
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (state 0x10) the Two-wire Serial Interface can access
the same Slave again, or a new Slave without transmitting a STOP condition. Repeated
START enables the Master to switch between Slaves, Master Transmitter mode and
Master Receiver mode without losing control over the bus.
TWCR
Value
To/from TWDR
Load SLA+R
Load SLA+R or
Load SLA+W
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action or
No TWDR action
Read data byte or
Read data byte
Read data byte or
Read data byte or
Read data byte
TWINT
Application Software Response
1
STA
0
0
0
0
1
0
0
1
0
1
0
0
1
0
1
TWEA
X
STO
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
To TWCR
TWSTA
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
TWSTO
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
0
Next Action Taken by TWI Hardware
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+W will be transmitted
Logic will switch to Master Transmitter mode
Two-wire Serial Bus will be released and not addressed
Slave mode will be entered
A START condition will be transmitted when the bus
becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO Flag will
be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO flag will
be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag Will be reset
TWWC
X
ATmega8535(L)
TWEN
1
–
0
TWIE
X
193
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