ATMEGA8535L-8JI Atmel, ATMEGA8535L-8JI Datasheet - Page 192
![IC AVR MCU 8K LV 8MHZ IND 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8535L-8JI
Manufacturer Part Number
ATMEGA8535L-8JI
Description
IC AVR MCU 8K LV 8MHZ IND 44PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535L-8JI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8535L-8JI
Manufacturer:
TI
Quantity:
5 000
Part Number:
ATMEGA8535L-8JI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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Master Receiver Mode
192
ATmega8535(L)
In the Master Receiver mode, a number of data bytes are received from a Slave Trans-
mitter (see Figure 88). In order to enter a Master mode, a START condition must be
transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT
mode is entered, if SLA+R is transmitted, MR mode is entered. All the status codes
mentioned in this section assume that the prescaler bits are zero or are masked to zero.
Figure 88. Data Transfer in Master Receiver Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be written to one to enable the Two-wire Serial Interface, TWSTA must be
written to one to transmit a START condition and TWINT must be set to clear the TWINT
Flag. The TWI will then test the Two-wire Serial Bus and generate a START condition as
soon as the bus becomes free. After a START condition has been transmitted, the
TWINT Flag is set by hardware, and the status code in TWSR will be 0x08 (see Table
75). In order to enter MR mode, SLA+R must be transmitted. This is done by writing
SLA+R to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to
continue the transfer. This is accomplished by writing the following value to TWCR:
When SLA+R have been transmitted and an acknowledgement bit has been received,
TWINT is set again and a number of status codes in TWSR are possible. Possible sta-
tus codes in Master mode are 0x38, 0x40, or 0x48. The appropriate action to be taken
for each of these status codes is detailed in Table 76. Received data can be read from
the TWDR Register when the TWINT Flag is set high by hardware. This scheme is
repeated until the last byte has been received. After the last byte has been received, the
MR should inform the ST by sending a NACK after the last received data byte. The
transfer is ended by generating a STOP condition or a repeated START condition. A
STOP condition is generated by writing the following value to TWCR:
SDA
SCL
TWCR
Value
TWCR
Value
TWCR
Value
RECEIVER
Device 1
MASTER
TWINT
TWINT
TWINT
1
1
1
TRANSMITTER
TWEA
TWEA
TWEA
Device 2
SLAVE
X
X
X
TWSTA
TWSTA
TWSTA
1
0
0
Device 3
TWSTO
TWSTO
TWSTO
0
0
1
........
TWWC
TWWC
TWWC
X
X
X
Device n
V
CC
TWEN
TWEN
TWEN
1
1
1
R1
–
0
–
0
–
0
2502K–AVR–10/06
R2
TWIE
TWIE
TWIE
X
X
X
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