PIC18LF2539T-I/SO Microchip Technology, PIC18LF2539T-I/SO Datasheet - Page 252

IC MCU FLASH 12KX16 EE AD 28SOIC

PIC18LF2539T-I/SO

Manufacturer Part Number
PIC18LF2539T-I/SO
Description
IC MCU FLASH 12KX16 EE AD 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2539T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
TBLWT
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
DS30485A-page 250
Q Cycle Activity:
operation
Decode
No
Q1
operation
operation
TABLAT)
[ label ]
None
if TBLWT*,
(TABLAT) → Holding Register;
TBLPTR - No Change;
if TBLWT*+,
(TABLAT) → Holding Register;
(TBLPTR) +1 → TBLPTR;
if TBLWT*-,
(TABLAT) → Holding Register;
(TBLPTR) -1 → TBLPTR;
if TBLWT+*,
(TBLPTR) +1 → TBLPTR;
(TABLAT) → Holding Register;
This instruction uses the 3 LSbs of the
TBLPTR to determine which of the 8
holding registers the TABLAT data is
written to. The 8 holding registers are
used to program the contents of Pro-
gram Memory (P.M.). See Section 5.0
for information on writing to FLASH
memory.
The TBLPTR (a 21-bit pointer) points
to each byte in the program memory.
TBLPTR has a 2 MBtye address
range. The LSb of the TBLPTR selects
which byte of the program memory
location to access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
Table Write
(Read
No
No
Q2
0000
TBLPTR[0] = 0: Least Significant
TBLPTR[0] = 1: Most Significant
operation
operation
TBLWT ( *; *+; *-; +*)
0000
No
No
Q3
Register or Memory)
Byte of Program
Memory Word
Byte of Program
Memory Word
(Write to Holding
0000
operation
operation
No
No
Q4
nn=0 *
11nn
=1 *+
=2 *-
=3 +*
Preliminary
TBLWT
Example1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
Table Write (Continued)
TBLWT
TBLWT
 2002 Microchip Technology Inc.
*+;
+*;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0x55
0x00A356
0xFF
0x55
0x00A357
0x55
0x34
0x01389A
0xFF
0xFF
0x34
0x01389B
0xFF
0x34

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