AT89C5131-S3SIL Atmel, AT89C5131-S3SIL Datasheet - Page 105

IC 8051 MCU FLASH 32K USB 52PLCC

AT89C5131-S3SIL

Manufacturer Part Number
AT89C5131-S3SIL
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet

Specifications of AT89C5131-S3SIL

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5131-S3SIL
Manufacturer:
Atmel
Quantity:
10 000
Table 80. Status for Master Receiver Mode
4136B–USB–09/03
(SSCS)
Status
Code
08h
10h
38h
40h
48h
50h
58h
Status of the TWI Bus and
A START condition has been
A repeated START condition
Arbitration lost in SLA+R or
transmitted; ACK has been
transmitted; NOT ACK has
received; ACK has been
received; NOT ACK has
has been transmitted
Data byte has been
Data byte has been
SLA+R has been
SLA+R has been
TWI Hardware
been received
been returned
NOT ACK bit
transmitted
received
returned
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
Read data byte or
Read data byte or
Read data byte or
No SSDAT action
No SSDAT action
No SSDAT action
To/from SSDAT
Load SLA+R or
Read data byte
read data byte
Load SLA+W
Load SLA+R
Application Software Response
STA
X
X
X
0
1
0
0
1
0
1
0
0
1
0
1
To SSCON
STO
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Next Action Taken by TWI Software
SLA+W will be transmitted;
ACK will be transmitted
SLA+W will be transmitted;
ACK will be transmitted
SLA+W will be transmitted
Logic will switched to master transmitter mode
TWI bus will be released and not addressed
slave mode will be entered
A START condition will be transmitted when the
bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and STO flag
will be reset
STOP condition followed by a START condition
will be transmitted and STO flag will be reset
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and STO flag
will be reset
STOP condition followed by a START condition
will be transmitted and STO flag will be reset
AT89C5131
105

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