Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 13

• Manufacturer Part Number: Z8F3201VN020EC00TR
• Description: IC ENCORE MCU FLASH 32K 44PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F3201VN020EC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F3201VN020EC00T

PS017610-0404
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IRQ2 Enable and Priority Encoding . . . . . . . . . . . . . . . . . 53
IRQ1 Enable High Bit Register (IRQ1ENH) . . . . . . . . . . 53
IRQ2 Enable Low Bit Register (IRQ2ENL) . . . . . . . . . . . 54
IRQ2 Enable High Bit Register (IRQ2ENH) . . . . . . . . . . 54
Interrupt Edge Select Register (IRQES) . . . . . . . . . . . . . . 55
Interrupt Port Select Register (IRQPS) . . . . . . . . . . . . . . . 55
Interrupt Control Register (IRQCTL) . . . . . . . . . . . . . . . . 56
Timer 0-3 High Byte Register (TxH) . . . . . . . . . . . . . . . . 67
Timer 0-3 Low Byte Register (TxL) . . . . . . . . . . . . . . . . . 67
Timer 0-3 Reload High Byte Register (TxRH) . . . . . . . . . 68
Timer 0-3 Reload Low Byte Register (TxRL) . . . . . . . . . . 68
Timer 0-3 PWM High Byte Register (TxPWMH) . . . . . . 69
Timer 0-3 PWM Low Byte Register (TxPWML) . . . . . . . 69
Timer 0-3 Control Register (TxCTL) . . . . . . . . . . . . . . . . 70
Watch-Dog Timer Approximate Time-Out Delays . . . . . . 73
Watch-Dog Timer Control Register (WDTCTL) . . . . . . . 75
Watch-Dog Timer Reload Upper Byte Register (WDTU) 76
Watch-Dog Timer Reload High Byte Register (WDTH) . 76
Watch-Dog Timer Reload Low Byte Register (WDTL) . . 77
UARTx Transmit Data Register (UxTXD) . . . . . . . . . . . . 86
UARTx Receive Data Register (UxRXD) . . . . . . . . . . . . . 87
UARTx Status 0 Register (UxSTAT0) . . . . . . . . . . . . . . . 87
UARTx Control 0 Register (UxCTL0) . . . . . . . . . . . . . . . 89
UARTx Status 1 Register (UxSTAT1) . . . . . . . . . . . . . . . 89
UARTx Control 1 Register (UxCTL1) . . . . . . . . . . . . . . . 90
UARTx Baud Rate High Byte Register (UxBRH) . . . . . . 91
UARTx Baud Rate Low Byte Register (UxBRL) . . . . . . . 92
UART Baud Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
SPI Clock Phase (PHASE) and Clock Polarity
(CLKPOL) Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
SPI Data Register (SPIDATA) . . . . . . . . . . . . . . . . . . . . 106
SPI Control Register (SPICTL) . . . . . . . . . . . . . . . . . . . . 107
SPI Status Register (SPISTAT) . . . . . . . . . . . . . . . . . . . . 108
SPI Mode Register (SPIMODE) . . . . . . . . . . . . . . . . . . . 109
SPI Baud Rate High Byte Register (SPIBRH) . . . . . . . . 110
SPI Baud Rate Low Byte Register (SPIBRL) . . . . . . . . . 110
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!
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