Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 14

• Manufacturer Part Number: Z8F3201VN020EC00TR
• Description: IC ENCORE MCU FLASH 32K 44PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F3201VN020EC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F3201VN020EC00T

PS017610-0404
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Table 99.
Table 100. Recommended Crystal Oscillator Specifications
I2C Data Register (I2CDATA) . . . . . . . . . . . . . . . . . . . . 118
I2C Status Register (I2CSTAT) . . . . . . . . . . . . . . . . . . . . 118
I2C Control Register (I2CCTL) . . . . . . . . . . . . . . . . . . . . 119
I2C Baud Rate High Byte Register (I2CBRH) . . . . . . . . 121
I2C Baud Rate Low Byte Register (I2CBRL) . . . . . . . . . 121
DMAx Control Register (DMAxCTL) . . . . . . . . . . . . . . 124
DMAx I/O Address Register (DMAxIO) . . . . . . . . . . . . 126
DMAx Address High Nibble Register (DMAxH) . . . . . . 126
DMAx End Address Low Byte Register (DMAxEND) . 128
DMAx Start/Current Address Low Byte Register
(DMAxSTART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
DMA_ADC Register File Address Example . . . . . . . . . . 129
DMA_ADC Address Register (DMAA_ADDR) . . . . . . 129
DMA_ADC Control Register (DMAACTL) . . . . . . . . . . 130
DMA_ADC Status Register (DMAA_STAT) . . . . . . . . . 131
ADC Control Register (ADCCTL) . . . . . . . . . . . . . . . . . 135
ADC Data High Byte Register (ADCD_H) . . . . . . . . . . . 137
ADC Data Low Bits Register (ADCD_L) . . . . . . . . . . . . 137
Z8F640x family Flash Memory Configurations . . . . . . . 138
Flash Code Protection Using the Option Bits . . . . . . . . . 142
Flash Control Register (FCTL) . . . . . . . . . . . . . . . . . . . . 144
Flash Status Register (FSTAT) . . . . . . . . . . . . . . . . . . . . 145
Flash Page Select Register (FPS) . . . . . . . . . . . . . . . . . . . 146
Flash Frequency High Byte Register (FFREQH) . . . . . . 147
Flash Frequency Low Byte Register (FFREQL) . . . . . . . 147
Option Bits At Program Memory Address 0000H . . . . . 149
Options Bits at Program Memory Address 0001H . . . . . 150
OCD Baud-Rate Limits . . . . . . . . . . . . . . . . . . . . . . . . . . 154
On-Chip Debugger Commands . . . . . . . . . . . . . . . . . . . . 156
OCD Control Register (OCDCTL) . . . . . . . . . . . . . . . . . 161
OCD Status Register (OCDSTAT) . . . . . . . . . . . . . . . . . 162
OCD Watchpoint Control/Address (WPTCTL) . . . . . . . 163
OCD Watchpoint Address (WPTADDR) . . . . . . . . . . . . 164
OCD Watchpoint Data (WPTDATA) . . . . . . . . . . . . . . . 164
(20MHz Operation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!
List of Tables
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