Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 153

• Manufacturer Part Number: Z8F3201VN020EC00TR
• Description: IC ENCORE MCU FLASH 32K 44PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F3201VN020EC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F3201VN020EC00T

Table 80. ADC Control Register (ADCCTL)
ADC Control Register Definitions
PS017610-0404
RESET
FIELD
ADDR
BITS
R/W
DMA Control of the ADC
ADC Control Register
CEN
R/W
7
0
3. When the first conversion in continuous operation is complete (after 5129 system
4. Thereafter, the ADC writes a new 10-bit data result to {ADCD_H[7:0],
5. To disable continuous conversion, clear the CONT bit in the ADC Control register
The Direct Memory Access (DMA) Controller can control operation of the ADC includ-
ing analog input selection and conversion enable. For more information on the DMA and
configuring for ADC operations refer to the Direct Memory Access Controller chapter.
The ADC Control register selects the analog input channel and initiates the analog-to-dig-
ital conversion.
CEN—Conversion Enable
0 = Conversion is complete. Writing a 0 produces no effect. The ADC automatically clears
–
–
–
clock cycles, plus the 40 cycles for power-up, if necessary), the ADC control logic
performs the following operations:
–
–
ADCD_L[7:6]} every 256 system clock cycles.
to 0.
Reserved
Set CONT to 1 to select continuous conversion.
Write to VREF to enable or disable the internal voltage reference generator.
Set CEN to 1 to start the conversions.
CEN resets to 0 to indicate the first conversion is complete. CEN remains 0 for all
subsequent conversions in continuous operation.
An interrupt request is sent to the Interrupt Controller to indicate the first
conversion is complete. An interrupt request is not sent for subsequent
conversions in continuous operation.
R/W
6
0
VREF
R/W
5
0
CONT
R/W
4
0
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
F70H
3
2
ANAIN[3:0]
Analog-to-Digital Converter
0000
R/W
1
Z8 Encore!
0
®
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