MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 85

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LBCL – Last bit clock
This bit allows the user to select whether the clock associated with the last data bit transmitted
(MSB) has to be output to the SCLK pin. The clock of the last data bit is output to the SCLK pin if
the LBCL bit is a logic one, and is not output if it is a logic zero.
The last bit is the 8th or 9th data bit transmitted depending on the 8 or 9 bit format selected by
M-bit
This bit should not be manipulated while the transmitter is enabled.
MC68HC05B6
Rev. 4.1
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
clock
clock
clock
clock
data
Idle or preceding
(seeTable
transmission
6-2).
Start
Start
Figure 6-10 SCI data clock timing diagram (M=1)
Data format
SERIAL COMMUNICATIONS INTERFACE
LSB
8 bit
8 bit
9 bit
9 bit
0
Table 6-2 SCI clock on SCLK pin
1
M-bit
0
0
1
1
2
M = 1 (9 data bits)
LBCL bit
3
0
1
0
1
*
LBCL bit controls last data clock
4
Number of clocks on
5
SCLK pin
7
8
8
9
6
MSB
7
Stop
*
*
8
*
*
Stop
Idle or next
transmission
Freescale
6-13
6

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