MC68HC705C9ACFB Freescale Semiconductor, MC68HC705C9ACFB Datasheet - Page 30
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MC68HC705C9ACFB
Manufacturer Part Number
MC68HC705C9ACFB
Description
IC MCU 16K 2.1MHZ OTP 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MC705C9ACPE.pdf
(118 pages)
Specifications of MC68HC705C9ACFB
Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC705C9ACFB
Manufacturer:
FREESCALE
Quantity:
164
Company:
Part Number:
MC68HC705C9ACFB
Manufacturer:
MOTOROLA
Quantity:
2 161
Company:
Part Number:
MC68HC705C9ACFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC705C9ACFB
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Company:
Part Number:
MC68HC705C9ACFBE
Manufacturer:
FREESCALE
Quantity:
1 827
Company:
Part Number:
MC68HC705C9ACFBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory
30
$000A
$000B
$000C
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
Addr.
Port C Data Direction Register
Port D Data Direction Register
Port A Data Direction Register
Port B Data Direction Register
Register Name
Port A Data Register
Port B Data Register
Port C Data Register
Port D Data Register
SPI Control Register
SPI Status Register
(DDRD) C9A Only
SPI Data Register
Unimplemented
Unimplemented
See page 47.
See page 48.
See page 48.
See page 48.
See page 47.
See page 48.
See page 48.
See page 48.
See page 75.
See page 76.
See page 77.
(PORTA)
(PORTB)
(PORTC)
(PORTD)
Figure 2-4. Input/Output Registers (Sheet 1 of 3)
(DDRC)
(DDRA)
(DDRB)
(SPCR)
(SPSR)
(SPDR)
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
DDRC7
DDRC7
DDRA7
DDRB7
SPD7
SPIE
Bit 7
SPIF
PA7
PB7
PC7
PD7
0
0
0
0
0
0
= Unimplemented
DDRC6
DDRA6
DDRB6
WCOL
SPD6
SPE
PA6
PB6
PC6
6
0
0
0
0
0
0
DDRC5
DDRC5
DDRA5
DDRB5
DWOM
(C9A)
SPD5
PA5
PB5
PC5
PD5
5
0
0
0
0
0
0
DDRC4
DDRC4
DDRA4
DDRB4
MODF
MSTR
SPD4
PA4
Unaffected by reset
PB4
Unaffected by reset
PC4
Unaffected by reset
PD4
Unaffected by reset
Unaffected by reset
R
4
0
0
0
0
0
0
= Reserved
DDRA3
DDRB3
DDRC3
DDRC3
CPOL
SPD3
PA3
PB3
PC3
PD3
3
0
0
0
0
0
0
DDRA2
DDRB2
DDRC2
DDRC2
CPHA
SPD2
PC2
PD2
PA2
PB2
Freescale Semiconductor
2
0
0
0
0
1
0
U = Unaffected
DDRA1
DDRB1
DDRC1
DDRC1
SPR1
SPD1
PA1
PB1
PC1
PD1
U
1
0
0
0
0
0
DDRC0
DDRC0
DDRA0
DDRB0
SPR0
SPD0
Bit 0
PA0
PB0
PC0
PD0
U
0
0
0
0
0