MC68HC705C9ACFB Freescale Semiconductor, MC68HC705C9ACFB Datasheet - Page 54
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MC68HC705C9ACFB
Manufacturer Part Number
MC68HC705C9ACFB
Description
IC MCU 16K 2.1MHZ OTP 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MC705C9ACPE.pdf
(118 pages)
Specifications of MC68HC705C9ACFB
Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Capture/Compare Timer
8.3.2 Timer Status Register
The timer status register (TSR), shown in
ICF — Input Capture Flag
OCF — Output Compare Flag
TOF — Timer Overflow Flag
54
•
•
•
The ICF bit is set automatically when an edge of the selected polarity occurs on the TCAP pin. Clear
the ICF bit by reading the timer status register with ICF set and then reading the low byte ($0015) of
the input capture registers. Resets have no effect on ICF.
The OCF bit is set automatically when the value of the timer registers matches the contents of the
output compare registers. Clear the OCF bit by reading the timer status register with OCF set and then
reading the low byte ($0017) of the output compare registers. Resets have no effect on OCF.
The TOF bit is set automatically when the 16-bit counter rolls over from $FFFF to $0000. Clear the
TOF bit by reading the timer status register with TOF set, and then reading the low byte ($0019) of the
timer registers. Resets have no effect on TOF.
An active signal on the TCAP pin, transferring the contents of the timer registers to the input
capture registers
A match between the 16-bit counter and the output compare registers, transferring the OLVL bit to
the TCMP pin
A timer roll over from $FFFF to $0000
Reset:
$0013
Read:
Write:
Bit 7
ICF
U
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Figure 8-3. Timer Status Register (TSR)
= Unimplemented
OCF
U
6
TOF
Figure
U
5
U = Undetermined
8-3, contains flags to signal the following conditions:
4
0
0
3
0
0
2
0
0
1
0
0
Freescale Semiconductor
Bit 0
0
0