C8051F022 Silicon Laboratories Inc, C8051F022 Datasheet - Page 226
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F022
Manufacturer Part Number
C8051F022
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Specifications of C8051F022
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F022
Manufacturer:
SILICON
Quantity:
513
Company:
Part Number:
C8051F022
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F022-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F022-GQ
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F022-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F022R
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F020/1/2/3
226
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bits2-0:
R/W
Bit7
-
UNUSED. Read = 0b, Write = don’t care.
T4M: Timer 4 Clock Select.
This bit controls the division of the system clock supplied to Timer 4. This bit is ignored when the
timer is in baud rate generator mode or counter mode (i.e. C/T4 = 1).
0: Timer 4 uses the system clock divided by 12.
1: Timer 4 uses the system clock.
T2M: Timer 2 Clock Select.
This bit controls the division of the system clock supplied to Timer 2. This bit is ignored when the
timer is in baud rate generator mode or counter mode (i.e. C/T2 = 1).
0: Timer 2 uses the system clock divided by 12.
1: Timer 2 uses the system clock.
T1M: Timer 1 Clock Select.
This bit controls the division of the system clock supplied to Timer 1.
0: Timer 1 uses the system clock divided by 12.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit controls the division of the system clock supplied to Counter/Timer 0.
0: Counter/Timer uses the system clock divided by 12.
1: Counter/Timer uses the system clock.
Reserved. Read = 000b, Must Write = 000.
T4M
R/W
Bit6
Figure 22.1. CKCON: Clock Control Register
T2M
R/W
Bit5
T1M
R/W
Bit4
Rev. 1.4
T0M
R/W
Bit3
Reserved
R/W
Bit2
Reserved
R/W
Bit1
Reserved
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8E