HD64F3694FY Renesas Electronics America, HD64F3694FY Datasheet - Page 183
![IC H8 MCU FLASH 32K 48-LQFP](/photos/28/61/286105/48-lqfp__plqp0048kc-a_sml.jpg)
HD64F3694FY
Manufacturer Part Number
HD64F3694FY
Description
IC H8 MCU FLASH 32K 48-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3694GFYV.pdf
(452 pages)
Specifications of HD64F3694FY
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3694FYJV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F3694FYV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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The timer W has a 16-bit timer having output compare and input capture functions. The timer W
can count external events and output pulses with an arbitrary duty cycle by compare match
between the timer counter and four general registers. Thus, it can be applied to various systems.
12.1
Table 12.1 summarizes the timer W functions, and figure 12.1 shows a block diagram of the timer
W.
TIM08W0A_000020020200
Selection of five counter clock sources: four internal clocks ( , /2, /4, and /8) and an
external clock (external events can be counted)
Capability to process up to four pulse outputs or four pulse inputs
Four general registers:
Four selectable operating modes :
Any initial timer output value can be set
Five interrupt sources
Four compare match/input capture interrupts and an overflow interrupt.
Independently assignable output compare or input capture functions
Usable as two pairs of registers; one register of each pair operates as a buffer for the output
compare or input capture register
Waveform output by compare match
Selection of 0 output, 1 output, or toggle output
Input capture function
Rising edge, falling edge, or both edges
Counter clearing function
Counters can be cleared by compare match
PWM mode
Up to three-phase PWM output can be provided with desired duty ratio.
Features
Section 12 Timer W
Rev.5.00 Nov. 02, 2005 Page 153 of 418
Section 12 Timer W
REJ09B0028-0500
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