HD6417032F20 Renesas Electronics America, HD6417032F20 Datasheet - Page 309

IC SUPERH MPU ROMLESS 112QFP

HD6417032F20

Manufacturer Part Number
HD6417032F20
Description
IC SUPERH MPU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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When GR Settings are Outside the Count Range (H'0000–GRA3): Waveforms with a duty
cycle of 0% and 100% can be output by setting GR outside the count area. Be sure to make the
direction of the count (increment/decrement) when writing a setting from outside the count area
into the buffer register (BR) the same as the count direction when writing the setting that returns to
within the count area in BR.
The above settings are made by detecting the occurrence of a GRA3 compare match or underflow
of TCNT4 and then writing to BR. They can also be accomplished by starting the DMAC with a
GRA3 compare match.
Output pin
Output pin
H' 0000
GRA3
H' FFFF
H' 0000
Figure 10.41 Example of Changing GR Settings with Buffer Operation (2)
Figure 10.40 Caution on Changing GR Settings with Buffer Operation (2)
GR
GR
BR
TCNT4
T – 1
T
Write on decrement
0% duty
Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
TCNT3
Write on increment
Rev. 7.00 Jan 31, 2006 page 281 of 658
100% duty
Changes prohibited
REJ09B0272-0700

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