HD6417032F20 Renesas Electronics America, HD6417032F20 Datasheet - Page 667

• Manufacturer Part Number: HD6417032F20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417032F20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

A.2.64
Start Address: H'5FFFFF0
Bus Width: 8/16
Table A.65 TPMR Bit Functions
Bit
3
2
1
0
Bit
Initial value
Read/Write
Bit Name
Group 3 non-
overlap
(G3NOV)
Group 2 non-
overlap
(G2NOV)
Group 1 non-
overlap
(G1NOV)
Group 0 non-
overlap
(G0NOV)
TPC Output Mode Register (TPMR)
—
—
7
1
Value Description
0
1
0
1
0
1
0
1
—
—
TPC output group 3 operates normally (the output value is
updated at every compare match A of the selected ITU)
TPC output group 3 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
TPC output group 2 operates normally (the output value is
updated at every compare match A of the selected ITU)
TPC output group 2 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
TPC output group 1 operates normally (the output value is
updated at every compare match A of the selected ITU)
TPC output group 1 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
TPC output group 0 operates normally (the output value is
updated at every compare match A of the selected ITU)
TPC output group 0 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
6
1
—
—
5
1
Appendix A On-Chip Supporting Module Registers
—
—
4
1
Rev. 7.00 Jan 31, 2006 page 639 of 658
G3NOV G2NOV G1NOV G0NOV
R/W
3
0
R/W
2
0
REJ09B0272-0700
R/W
0
1
(Initial value)
(Initial value)
(Initial value)
(Initial value)
R/W
0
0
TPC