XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 194

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XC705B32CFNE

Manufacturer Part Number
XC705B32CFNE
Description
IC MCU 2.1MHZ 32K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC705B32CFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC705B32CFNE
Manufacturer:
SILICON
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Part Number:
XC705B32CFNE
Manufacturer:
Freescale Semiconductor
Quantity:
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14
EPROM will not be available for code execution while the E6LAT bit is set. The V
must occur externally after the E6PGM bit is set, for example under control of a signal generated
on a pin by the programming routine.
Note:
To allow simultaneous programming of up to eight bytes, these bytes must be in the same group
of addresses which share the same most significant address bits; only the three least significant
bits can change.
E.3.3
E6LAT — EPROM programming latch enable bit
STOP, power-on and external reset clear the E6LAT bit.
Note:
E6PGM — EPROM program enable bit
This bit is the EPROM program enable bit. It can be set to ‘1’ to enable programming only after
E6LAT is set and at least one byte is written to the EPROM. It is not possible to clear this bit using
software but clearing E6LAT will always clear E6PGM.
Note:
Freescale
E-6
EPROM/EEPROM/ECLK control
1 (set)
0 (clear) –
When the part becomes a PROM, only the cumulative programming of bits to logic ‘1’
is possible if multiple programming is made on the same byte.
After the t
to zero in order to clear the E6PGM bit.
The E6PGM bit can never be set while the E6LAT bit is at zero.
EPROM/EEPROM/ECLK control register
ERA1
Address and up to eight data bytes can be latched into the EPROM
for further programming providing the E6PGM bit is cleared.
Data can be read from the EPROM or firmware ROM; the E6PGM bit
is reset to zero when E6LAT is ‘0’.
E6LAT E6PGM
0
1
1
erase time or t
Table E-2 EPROM control bits description
Address
$0007
0
0
1
Read/execute in EPROM
Ready to write address/data to EPROM
programming in progress
bit 7
MC68HC705B16
PROG1
bit 6
programming time, the E6LAT bit has to be reset
E6LAT E6PGM ECLK E1ERA E1LAT E1PGM 0000 0000
bit 5
Description
bit 4
bit 3
bit 2
bit 1
MC68HC05B6
bit 0
PP6
switching
Rev. 4.1
on reset
State

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