XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 198

• Manufacturer Part Number: XC705B32CFNE
• Description: IC MCU 2.1MHZ 32K OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC705B32CFNE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14
E.4
The 432 bytes of self-check firmware on the MC68HC05B6 are replaced by 576 bytes of bootstrap
firmware. A detailed description of the modes of operation within bootstrap mode is given below.
The bootstrap program in mask ROM address locations $0200 to $024F and $3E00 to $3FEF can
be used to program the EPROM and the EEPROM, to check if the EPROM is erased or to load
and execute data in RAM.
After reset, while going to the bootstrap mode, the vector located at address $3FEE and $3FEF
(RESET) is fetched to start execution of the bootstrap program. To place the part in bootstrap
mode, the IRQ pin should be at + 9V with the TCAP1 pin ‘high’ during transition of the RESET pin
from low to high. The hold time on the IRQ and TCAP1 pins is two clock cycles after the external
RESET pin is brought high.
When the MC68HC705B16 is placed in the bootstrap mode, the bootstrap reset vector is fetched
and the bootstrap firmware starts to execute.
each level of bootstrap mode on the rising edge of RESET.
The bootstrap program first copies part of itself in RAM (except ‘RAM parallel load’), as the
program cannot be executed in ROM during verification/programming of the EPROM. It then sets
the TCMP1 output to a logic high level.
Freescale
E-10
x = Don’t care
V
+ 9 Volts
+ 9 Volts
+ 9 Volts
+ 9 Volts
+ 9 Volts
SS
IRQ pin
to V
DD
Bootstrap mode
TCAP1 pin PD1 PD2 PD3 PD4
V
SS
V
V
V
V
V
to V
DD
DD
DD
DD
DD
DD
0
1
1
x
x
x
Table E-4 Mode of operation selection
x
0
0
0
x
x
x
x
0
1
0
1
MC68HC705B16
x
0
0
0
1
1
Single chip
Erased EPROM verification (EEV)
Erased EPROM verification; erase EEPROM; EPROM/EEPROM
parallel program/verify
Erased EPROM verification; erase EEPROM;
EPROM/EEPROM/ RAM serial bootstrap load and execute
RAM parallel bootstrap load and execute (if SEC bit = 1)
Serial EPROM/EEPROM/RAM bootloader (if SEC = 1)
Table E-4
shows the conditions required to enter
Mode
MC68HC05B6
Rev. 4.1