XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 258

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XC705B32CFNE

Manufacturer Part Number
XC705B32CFNE
Description
IC MCU 2.1MHZ 32K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC705B32CFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
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14
H.4.1
The execution of a program in the EPROM address range or a load from the EPROM are both
read operations. The E6LAT bit in the EPROM/EEPROM control register should be cleared to ‘0’
which automatically resets the E6PGM bit. In this way the EPROM is read like a normal ROM.
Reading the EPROM with the E6LAT bit set will give data that does not correspond to the actual
memory content. As interrupt vectors are in EPROM, they will not be loaded when E6LAT is set.
Similarly, the bootstrap ROM routines cannot be executed when E6LAT is set. In read mode, the
VPP6 pin must be at the V
set to the read mode.
Note:
H.4.2
Typically, the EPROM will be programmed by the bootstrap routines resident in the on-chip ROM.
However, the user program can be used to program some EPROM locations if the proper
procedure is followed. In particular, the programming sequence must be running in RAM, as the
EPROM will not be available for code execution while the E6LAT bit is set. The V
must occur externally after EPGM is set, for example under control of a signal generated on a pin
by the programming routine.
Note:
To allow simultaneous programming of up to sixteen bytes, these bytes must be in the same group
of addresses which share the same most significant address bits; only the four LSBs can change.
H.4.3
Freescale
H-8
EPROM/EEPROM/ECLK control
An erased byte reads as $00.
Unless the part has a window for reprogramming, only the cumulative programming of
bits to logic ‘1’ is possible if multiple programming is made on the same byte.
EPROM read operation
EPROM program operation
EPROM/EEPROM control register
DD
Address
level. When entering the STOP mode, the EPROM is automatically
$0007
bit 7
MC68HC705B32
bit 6
0
E6LAT E6PGM ECLK E1ERA E1LAT E1PGM u000 0000
bit 5
bit 4
bit 3
bit 2
bit 1
MC68HC05B6
bit 0
PP6
switching
Rev. 4.1
on reset
State

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