R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 42

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

1. Overview
Rev.1.00 Jan. 10, 2008 Page 10 of 1658
REJ09B0261-0100
Item
Display unit (DU)
Serial
communications
interface with FIFO
(SCIF)
Features
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Display plane
⎯ 6 planes (a maximum number at 480 dots x 234 dots)
⎯ 4 planes (a maximum number at 854 dots x 480 dots)
⎯ 3 planes (a maximum number at 800 dots x 600 dots)
CRT scanning method: Non-interlaced, interlaced, interlaced sync & video
Synchronization modes: Master mode (internal synchronization mode),
TV synchronization mode (external synchronization mode),
synchronization-mode switching mode
Incorporates color palettes
⎯ Displays 256 colors from among 260 thousand possible colors
⎯ Four palettes (one can be set for each layer)
Blending ratio setting
⎯ Number of color-palette planes with blending ratios: Four
⎯ α plane: (used in common with the display plane)
Digital RGB output: 6-bit precision for each of R, G, and B
Dot clock: Can be switched between external input and internal clock
(division ratio: from 1 to 32)
Number of channels: Six (max.)
On-chip 64-byte (8 bits x 64) FIFO for each of the six channels
Two full-duplex channels
Choice of asynchronous mode or synchronous mode
Any bit rate that can be generated by the on-chip baud-rate generator is
selectable
On-chip modem-control function (RTS and CTS) for channel 0
Internal clock signal from the baud-rate generator or external clock signal
from the SCK pin is selectable