PIC18F2510-E/SP Microchip Technology, PIC18F2510-E/SP Datasheet - Page 365
![IC MCU FLASH 16KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2510-E/SP
Manufacturer Part Number
PIC18F2510-E/SP
Description
IC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18LF2410-ISO.pdf
(376 pages)
4.PIC18LF2410-ISO.pdf
(8 pages)
5.PIC18LF2410-ISO.pdf
(16 pages)
6.PIC18LF2410-ISO.pdf
(6 pages)
7.PIC18LF2410-ISO.pdf
(6 pages)
8.PIC18LF2410-ISO.pdf
(8 pages)
Specifications of PIC18F2510-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18LF2410-ISO PDF datasheet #3
- PIC18LF2410-ISO PDF datasheet #4
- PIC18LF2410-ISO PDF datasheet #5
- PIC18LF2410-ISO PDF datasheet #6
- PIC18LF2410-ISO PDF datasheet #7
- PIC18LF2410-ISO PDF datasheet #8
- Current page: 365 of 376
- Download datasheet (7Mb)
Direct Addressing ............................................................... 72
E
Effect on Standard PIC Instructions ........................... 73, 306
Effects of Power Managed Modes on Various Clock Sources
Electrical Characteristics .................................................. 313
Enhanced Capture/Compare/PWM (ECCP) .................... 139
Enhanced PWM Mode. See PWM (ECCP Module). ........ 141
Enhanced Universal Synchronous Asynchronous Receiver
Equations
Errata ................................................................................... 8
EUSART
Extended Instruction Set .................................................. 301
External Clock Input ........................................................... 26
© 2009 Microchip Technology Inc.
33
Capture and Compare Modes .................................. 140
Capture Mode. See Capture (ECCP Module).
Outputs and Configuration ....................................... 140
Pin Configurations for ECCP1 ................................. 140
PWM Mode. See PWM (ECCP Module).
Standard PWM Mode ............................................... 140
Timer Resources ...................................................... 140
Transmitter (EUSART). See EUSART.
A/D Acquisition Time ................................................ 218
A/D Minimum Charging Time ................................... 218
Asynchronous Mode ................................................ 202
Baud Rate Generator
Baud Rate Generator (BRG) .................................... 197
Synchronous Master Mode ...................................... 208
Synchronous Slave Mode ........................................ 211
ADDFSR .................................................................. 302
ADDULNK ................................................................ 302
and Using MPLAB Tools .......................................... 308
CALLW ..................................................................... 303
Considerations for Use ............................................ 306
MOVSF .................................................................... 303
MOVSS .................................................................... 304
PUSHL ..................................................................... 304
SUBFSR .................................................................. 305
SUBULNK ................................................................ 305
Syntax ...................................................................... 301
12-Bit Break Transmit and Receive ................. 207
Associated Registers, Receive ........................ 205
Associated Registers, Transmit ....................... 203
Auto-Wake-up on Sync Break ......................... 206
Receiver ........................................................... 204
Setting up 9-bit Mode with Address Detect ...... 204
Transmitter ....................................................... 202
Operation in Power Managed Mode ................ 197
Associated Registers ....................................... 197
Auto-Baud Rate Detect .................................... 200
Baud Rate Error, Calculating ........................... 197
Baud Rates, Asynchronous Modes ................. 198
High Baud Rate Select (BRGH Bit) ................. 197
Sampling .......................................................... 197
Associated Registers, Receive ........................ 210
Associated Registers, Transmit ....................... 209
Reception ......................................................... 210
Transmission ................................................... 208
Associated Registers, Receive ........................ 212
Associated Registers, Transmit ....................... 211
Reception ......................................................... 212
Transmission ................................................... 211
F
Fail-Safe Clock Monitor ........................................... 239, 251
Fast Register Stack ........................................................... 58
Flash Program Memory ..................................................... 77
FSCM. See Fail-Safe Clock Monitor.
G
General Call Address Support ......................................... 176
GOTO .............................................................................. 280
H
Hardware Multiplier ............................................................ 81
High/Low-Voltage Detect ................................................. 233
HLVD. See High/Low-Voltage Detect. ............................. 233
I
I/O Ports ............................................................................ 97
I
2
C Mode (MSSP)
Interrupts in Power Managed Modes ....................... 252
POR or Wake from Sleep ........................................ 252
WDT During Oscillator Failure ................................. 251
Associated Registers ................................................. 79
Control Registers ....................................................... 78
Reading ..................................................................... 78
TABLAT (Table Latch) Register ................................ 78
Table Reads and Table Writes .................................. 77
TBLPTR (Table Pointer) Register .............................. 78
Introduction ................................................................ 81
Operation ................................................................... 81
Performance Comparison .......................................... 81
Applications ............................................................. 236
Associated Registers ............................................... 237
Characteristics ......................................................... 330
Current Consumption .............................................. 235
Effects of a Reset .................................................... 237
Operation ................................................................. 234
Setup ....................................................................... 235
Start-up Time ........................................................... 235
Typical Application ................................................... 236
Acknowledge Sequence Timing .............................. 186
Baud Rate Generator .............................................. 179
Bus Collision
Clock Arbitration ...................................................... 180
Clock Stretching ...................................................... 172
Clock Synchronization and the CKP bit (SEN = 1) .. 173
Effects of a Reset .................................................... 187
General Call Address Support ................................. 176
I
Master Mode ............................................................ 177
Multi-Master Communication, Bus Collision and
Multi-Master Mode ................................................... 187
Operation ................................................................. 166
2
C Clock Rate w/BRG ............................................ 179
PIC18F2X1X/4X1X
During Sleep .................................................... 237
During a Repeated Start Condition .................. 190
During a Stop Condition .................................. 191
10-Bit Slave Receive Mode (SEN = 1) ............ 172
10-Bit Slave Transmit Mode ............................ 172
7-Bit Slave Receive Mode (SEN = 1) .............. 172
7-Bit Slave Transmit Mode .............................. 172
Operation ......................................................... 178
Reception ........................................................ 183
Repeated Start Timing ..................................... 182
Start Condition Timing ..................................... 181
Transmission ................................................... 183
Arbitration ........................................................ 187
DS39636D-page 367
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