MCF5274LVM166 Freescale Semiconductor, MCF5274LVM166 Datasheet - Page 38

• Manufacturer Part Number: MCF5274LVM166
• Description: IC MPU 32BIT COLDF 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5274LVM166

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 61
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Operating Temperature Range: 0°C To +70°C
• Frequency Typ: 166MHz
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 166MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
8.12
Table 23
Table 24
38
Num
I1
I2
I3
I4
I5
I6
I7
I8
I9
lists specifications for the I
lists specifications for the I
1
2
3
I
2
Num
I1
I2
I3
I4
I5
I6
I7
I8
I9
Output numbers depend on the value programmed into the IFDR; an IFDR programmed with the
maximum frequency (IFDR = 0x20) results in minimum output timings as shown in
I
I2C_SCL low period. The actual position is affected by the prescale and division values
programmed into the IFDR; however, the numbers given in
Because I2C_SCL and I2C_SDA are open-collector-type outputs, which the processor can only
actively drive low, the time I2C_SCL or I2C_SDA take to reach a high level depends on external
signal capacitance and pull-up resistor values.
Specified at a nominal 50-pF load.
C Input/Output Timing Specifications
2
1
C interface is designed to scale the actual data transition time to move it to the middle of the
1
2
1
3
1
1
1
1
Table 24. I
Start condition hold time
Clock low period
I2C_SCL/I2C_SDA rise time (V
Data hold time
I2C_SCL/I2C_SDA fall time (V
Clock high time
Data setup time
Start condition setup time (for repeated start condition only)
Stop condition setup time
Table 23. I
Start condition hold time
Clock low period
I2C_SCL/I2C_SDA rise time
(V
Data hold time
I2C_SCL/I2C_SDA fall time
(V
Clock high time
Data setup time
Start condition setup time (for repeated start
condition only)
Stop condition setup time
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
IL
IH
= 0.5 V to V
= 2.4 V to V
2
2
C Output Timing Specifications between I2C_SCL and I2C_SDA
C Input Timing Specifications between I2C_SCL and I2C_SDA
IH
IL
Characteristic
= 2.4 V)
= 0.5 V)
Characteristic
2
2
C input timing parameters shown in
C output timing parameters shown in
IH
IL
= 2.4 V to V
= 0.5 V to V
IL
IH
= 0.5 V)
= 2.4 V)
Table 24
10 x t
20 x t
10 x t
10 x t
6 x t
7 x t
2 x t
Min
—
—
CYC
CYC
CYC
CYC
CYC
CYC
CYC
are minimum values.
2 x t
8 x t
4 x t
2 x t
2 x t
Min
—
—
0
0
CYC
CYC
CYC
CYC
CYC
Figure
Figure
Max
—
—
—
—
—
—
—
—
3
Table
Max
21.
—
—
—
—
—
—
—
1
1
21.
Freescale Semiconductor
24. The
Units
ns
ns
µs
ns
ns
ns
ns
ns
ns
Units
ms
ms
ns
ns
ns
ns
ns
ns
ns