DSP56F807VF80 Freescale Semiconductor, DSP56F807VF80 Datasheet - Page 17

no-image

DSP56F807VF80

Manufacturer Part Number
DSP56F807VF80
Description
IC DSP 80MHZ 60K FLASH 160-BGA
Manufacturer
Freescale Semiconductor
Series
56F8xxr
Datasheet

Specifications of DSP56F807VF80

Core Processor
56800
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSP56F807VF80
Manufacturer:
MOTOLOLA
Quantity:
745
Part Number:
DSP56F807VF80
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSP56F807VF80E
Manufacturer:
FREESCA
Quantity:
250
Part Number:
DSP56F807VF80E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSP56F807VF80E
Manufacturer:
FREESCALE
Quantity:
20 000
2.10 Serial Communications Interface (SCI) Signals
Freescale Semiconductor
No. of
Pins
1
1
1
1
GPIOE6
GPIOE5
GPIOE4
GPIOE7
Signal
Name
SCLK
MISO
MOSI
SS
Input/Outp
Input/Outp
Input/Outp
Input/Outp
Input/Outp
Signal
Output
Output
Input/
Input/
Type
Input
Table 2-14 Serial Peripheral Interface (SPI) Signals
ut
ut
ut
ut
ut
State During
56F807 Technical Data Technical Data, Rev. 16
Reset
Input
Input
Input
Input
Input
Input
Input
Input
SPI Master In/Slave Out (MISO)—This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device is
not selected.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
After reset, the default state is MISO.
SPI Master Out/Slave In (MOSI)—This serial data pin is an output from
a master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge that the
slave device uses to latch the data.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
After reset, the default state is MOSI.
SPI Serial Clock—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
After reset, the default state is SCLK.
SPI Slave Select—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
After reset, the default state is SS.
Signal Description
Serial Communications Interface (SCI) Signals
17

Related parts for DSP56F807VF80