DSP56F807VF80 Freescale Semiconductor, DSP56F807VF80 Datasheet - Page 4

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DSP56F807VF80

Manufacturer Part Number
DSP56F807VF80
Description
IC DSP 80MHZ 60K FLASH 160-BGA
Manufacturer
Freescale Semiconductor
Series
56F8xxr
Datasheet

Specifications of DSP56F807VF80

Core Processor
56800
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part 1 Overview
1.1 56F807 Features
1.1.1
1.1.2
1.1.3
4
Efficient 16-bit 56800 family controller engine with dual Harvard architecture
As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency
Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
Two 36-bit accumulators including extension bits
16-bit bidirectional barrel shifter
Parallel instruction set with unique processor addressing modes
Hardware DO and REP loops
Three internal address buses and one external address bus
Four internal data buses and one external data bus
Instruction set supports both DSP and controller functions
Controller style addressing modes and instructions for compact code
Efficient C compiler and local variable support
Software subroutine and interrupt stack with depth limited only by memory
JTAG/OnCE debug programming interface
Harvard architecture permits as many as three simultaneous accesses to Program and Data memory
On-chip memory including a low-cost, high-volume Flash solution
— 60K × 16-bit words of Program Flash
— 2K × 16-bit words of Program RAM
— 8K × 16-bit words of Data Flash
— 4K × 16-bit words of Data RAM
— 2K × 16-bit words of Boot Flash
Off-chip memory expansion capabilities programmable for 0, 4, 8, or 12 wait states
— As much as 64K × 16 bits of Data memory
— As much as 64K × 16 bits of Program memory
Two Pulse Width Modulator modules each with six PWM outputs, three Current Sense inputs, and four
Fault inputs, fault tolerant design with dead time insertion, supports both center- and edge-aligned modes
Four 12-bit, Analog-to-Digital Converters (ADCs), which support four simultaneous conversions with
quad, 4-pin multiplexed inputs; ADC and PWM modules can be synchronized
Two Quadrature Decoders each with four inputs or two additional Quad Timers
Processing Core
Memory
Peripheral Circuits for 56F807
56F807 Technical Data Technical Data, Rev. 16
Freescale Semiconductor

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