XR20M1172IG28-F Exar Corporation, XR20M1172IG28-F Datasheet - Page 21

• Manufacturer Part Number: XR20M1172IG28-F
• Description: IC UART FIFO I2C/SPI 64B 28TSSOP
• Manufacturer: Exar Corporation

Specifications of XR20M1172IG28-F

• Number Of Channels: 2, DUART
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 1.62 V ~ 3.63 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.62 V
• Supply Current: 250 uA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• No. Of Channels: 2
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TSSOP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1298-5

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
REV. 1.0.1
2.14.2
Auto Address Detection
Auto address detection mode is enabled when EFCR bit-0 = 1 and EFR bit-5 = 1. The desired slave address
will need to be written into the XOFF2 register. The receiver will try to detect an address byte that matches the
porgrammed character in the XOFF2 register. If the received byte is a data byte or an address byte that does
not match the programmed character in the XOFF2 register, the receiver will discard these data. Upon
receiving an address byte that matches the XOFF2 character, the receiver will be automatically enabled if not
already enabled, and the address character is pushed into the RX FIFO along with the parity bit (in place of the
parity error bit). The receiver also generates an LSR interrupt. The receiver will then receive the subsequent
data. If another address byte is received and this address does not match the programmed XOFF2 character,
then the receiver will automatically be disabled and the address byte is ignored. If the address byte matches
XOFF2, the receiver will put this byte in the RX FIFO along with the parity bit in the parity error bit.
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