SX1212IWLTRT Semtech, SX1212IWLTRT Datasheet - Page 35

• Manufacturer Part Number: SX1212IWLTRT
• Description: IC TXRX 300MHZ-510MHZ 32-TQFN
• Manufacturer: Semtech

Specifications of SX1212IWLTRT

• Frequency: 300MHz ~ 510MHz
• Data Rate - Maximum: 150kbps
• Modulation Or Protocol: FSK, OOK
• Applications: AMR, ISM, Home Automation, Process Control
• Power - Output: 12.5dBm
• Sensitivity: -110dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Modulation Type: FSK/OOK
• Package Type: TQFN EP
• Operating Supply Voltage (min): 2.1V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: SX1212IWLTR

Table 14: Data Operation Mode Selection
Each of these data operation modes is described fully in the following sections.
As illustrated in the Figure 26 below, the SX1212’s SPI interface consists of two sub blocks:
Both interfaces are configured in slave mode whilst the uC is configured as the master. They have separate
selection pins (NSS_CONFIG and NSS_DATA) but share the remaining pins:
As described below, only one interface can be selected at a time with NSS_CONFIG having the priority:
Rev 2 – June 18th, 2009
ADVANCED COMMUNICATIONS & SENSING
5.2. Control Block Description
SPI Config: used in all data operation modes to read and write the configuration registers which control all the
parameters of the chip (operating mode, bit rate, etc...)
SPI Data: used in Buffered and Packet mode to write and read data bytes to and from the FIFO. (FIFO
interrupts can be used to manage the FIFO content.)
SCK (SPI Clock): clock signal provided by the uC
MOSI (Master Out Slave In): data input signal provided by the uC
MISO (Master In Slave Out): data output signal provided by the SX1212
MCParam_Data_mode
5.2.1. SPI Interface
Registers
Registers
Config.
Config.
FIFO
00
01
1x
5.2.1.1. Overview
SX1212
Data Operation Mode
Figure 26: SPI Interface Overview and uC Connections
Continuous
Buffered
Packet
CONFIG
(slave)
(slave)
SPI
DATA
SPI
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NSS_CONFIG
MOSI
MISO
SCK
NSS_DATA
NSS_DATA
MOSI
MISO
SCK
NSS_CONFIG
(master)
µ C
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