SX1212IWLTRT Semtech, SX1212IWLTRT Datasheet - Page 37

IC TXRX 300MHZ-510MHZ 32-TQFN

SX1212IWLTRT

Manufacturer Part Number
SX1212IWLTRT
Description
IC TXRX 300MHZ-510MHZ 32-TQFN
Manufacturer
Semtech
Datasheet

Specifications of SX1212IWLTRT

Frequency
300MHz ~ 510MHz
Data Rate - Maximum
150kbps
Modulation Or Protocol
FSK, OOK
Applications
AMR, ISM, Home Automation, Process Control
Power - Output
12.5dBm
Sensitivity
-110dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK/OOK
Package Type
TQFN EP
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
SX1212IWLTR

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Part Number
Manufacturer
Quantity
Price
Part Number:
SX1212IWLTRT
Manufacturer:
SEMTECH/美国升特
Quantity:
20 000
Part Number:
SX1212IWLTRT
0
Company:
Part Number:
SX1212IWLTRT
Quantity:
16 674
Company:
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SX1212IWLTRT
Quantity:
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Note that when reading more than one register successively, it is not compulsory to toggle NSS_CONFIG back
high between two read sequences. The bytes are alternatively considered as address and value.
To write bytes into the FIFO the timing diagram below should be carefully followed by the uC.
Note that it is compulsory to toggle NSS_DATA back high between each byte written.
The byte is pushed into the FIFO on the rising edge of NSS_DATA
Rev 2 – June 18th, 2009
ADVANCED COMMUNICATIONS & SENSING
NSS_CONFIG (In)
SCK (In)
MOSI (In)
MISO (Out)
Write Byte (before/during Tx)
NSS_DATA (In)
SCK (In)
MOSI (In)
MISO (Out)
HZ
HZ
5.2.1.3. SPI Data
start
x
D1(7)
1
x
1
D1(6) D1(5) D1(4)
2
x
rw
2
x
3
x
A(4) A(3) A(2) A(1)
3
x
Figure 29: Write Bytes Sequence (ex: 2 bytes)
1
st
4
x
byte written
Address = A1
4
x
x
Figure 28: Read Register Sequence
D1(3) D1(2) D1(1)
5
x
5
x
6
x
6
x
7
x
Page 37 of 77
A(0)
7
D1(0)
x
8
x
stop
8
x
HZ
D(7) D(6) D(5) D(4) D(3) D(2) D(1)
x
9
D2(7) D2(6) D2(5)
x
1
10
x
2
x
11
x
3
x
Current value at
address A1
2
12
x
nd
D2(4)
4
x
byte written
13
x
D2(3) D2(2) D2(1)
5
x
14
6
x
x
7
x
15
x
D2(0)
8
x
www.semtech.com
16
D(0)
x
SX1212
x
HZ
HZ

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