PIC16F1828-I/SS Microchip Technology, PIC16F1828-I/SS Datasheet - Page 165

• Manufacturer Part Number: PIC16F1828-I/SS
• Description: IC PIC MCU 8BIT 14KB FLSH 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1828-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 18
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.4
In order for the DAC module to consume the least
amount of power, one of the two voltage reference input
sources to the resistor ladder must be disconnected.
Either the positive voltage source, (V
negative voltage source, (V
The negative voltage source is disabled by setting the
DACLPS bit in the DACCON0 register. Clearing the
DACLPS bit in the DACCON0 register disables the
positive voltage source.
17.4.1
The DAC output voltage can be set to V
least amount of power consumption by performing the
following:
• Clearing the DACEN bit in the DACCON0 register.
• Setting the DACLPS bit in the DACCON0 register.
• Configuring the DACPSS bits to the proper
• Configuring the DACR<4:0> bits to ‘11111’ in the
FIGURE 17-3:
17.5
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the DACCON0 register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
17.6
A device Reset affects the following:
• DAC is disabled.
• DAC output voltage is removed from the
• The DACR<4:0> range select bits are cleared.
 2010 Microchip Technology Inc.
positive source.
DACCON1 register.
DACOUT pin.
Output Clamped to Positive Voltage Source
DACEN = 0
DACLPS = 1
V
V
SRC
SRC
Low Power Voltage State
Operation During Sleep
Effects of a Reset
OUTPUT CLAMPED TO POSITIVE
VOLTAGE SOURCE
+
-
OUTPUT VOLTAGE CLAMPING EXAMPLES
SRC
R
R
R
-) can be disabled.
DACR<4:0> = 11111
DAC Voltage Ladder
(see
Figure
SRC
SRC
+), or the
+ with the
17-1)
Preliminary
This is also the method used to output the voltage level
from the FVR to an output pin. See
17-2: “Voltage Reference Output Buffer Example”
for more information.
Reference
17.4.2
The DAC output voltage can be set to V
least amount of power consumption by performing the
following:
• Clearing the DACEN bit in the DACCON0 register.
• Clearing the DACLPS bit in the DACCON0 register.
• Configuring the DACNSS bits to the proper
• Configuring the DACR<4:0> bits to ‘00000’ in the
This allows the comparator to detect a zero-crossing
while not consuming additional current through the DAC
module.
Reference
Output Clamped to Negative Voltage Source
negative source.
DACCON1 register.
PIC16(L)F1824/1828
DACEN = 0
DACLPS = 0
V
V
SRC
SRC
+
-
Figure 17-3
Figure 17-3
OUTPUT CLAMPED TO NEGATIVE
VOLTAGE SOURCE
for output clamping examples.
for output clamping examples.
R
R
R
DACR<4:0> = 00000
DAC Voltage Ladder
(see
Figure
DS41419B-page 165
Section FIGURE
SRC
17-1)
- with the