PIC16F1828-I/SS Microchip Technology, PIC16F1828-I/SS Datasheet - Page 93

IC PIC MCU 8BIT 14KB FLSH 20SSOP

PIC16F1828-I/SS

Manufacturer Part Number
PIC16F1828-I/SS
Description
IC PIC MCU 8BIT 14KB FLSH 20SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1828-I/SS

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.200", 5.30mm Width)
Controller Family/series
PIC16F
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1828-I/SS
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC16F1828-I/SS
0
8.5.1
The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, interrupt-on-change and
external INT pin interrupts.
REGISTER 8-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0/0
GIE
The IOCIF Flag bit is read only and cleared when all the Interrupt-on-Change flags in the IOCxF register
have been cleared by software.
INTCON REGISTER
GIE: Global Interrupt Enable bit
1 = Enables all active interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all active peripheral interrupts
0 = Disables all peripheral interrupts
TMR0IE: Timer0 Overflow Interrupt Enable bit
1 = Enables the Timer0 interrupt
0 = Disables the Timer0 interrupt
INTE: INT External Interrupt Enable bit
1 = Enables the INT external interrupt
0 = Disables the INT external interrupt
IOCIE: Interrupt-on-Change Enable bit
1 = Enables the interrupt-on-change
0 = Disables the interrupt-on-change
TMR0IF: Timer0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed
0 = TMR0 register did not overflow
INTF: INT External Interrupt Flag bit
1 = The INT external interrupt occurred
0 = The INT external interrupt did not occur
IOCIF: Interrupt-on-Change Interrupt Flag bit
1 = When at least one of the interrupt-on-change pins changed state
0 = None of the interrupt-on-change pins have changed state
R/W-0/0
PEIE
INTCON: INTERRUPT CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
TMR0IE
R/W-0/0
INTE
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
R/W-0/0
IOCIE
Note:
PIC16(L)F1824/1828
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Interrupt Enable bit, GIE, of the INTCON
register. User software should ensure the
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
R/W-0/0
TMR0IF
R/W-0/0
INTF
DS41419B-page 93
IOCIF
R-0/0
(1)
bit 0

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