WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 207

• Manufacturer Part Number: WM8351GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8351GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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24.3.12 WAKE-UP INTERRUPTS
The first-level WKUP_INT interrupt comprises several second-level interrupts. After a system reset,
these indicate to the host processor why the reset occurred. Each wake-up interrupt has a status bit
in Register R31 and a mask bit in Register R30, as defined in Table 153.
R31 (1Fh)
Comparator
Interrupt
Status
R39 (27h)
Comparator
Interrupt
Status Mask
Table 153 Wake-up Interrupts
ADDRESS
BIT
6:0
6
5
4
3
2
1
0
WKUP_OFF_STATE_EINT
WKUP_HIB_STATE_EINT
WKUP_CONV_FAULT_EINT
WKUP_WDOG_RST_EINT
WKUP_GP_PWR_ON_EINT
WKUP_ONKEY_EINT
WKUP_GP_WAKEUP_EINT
“IM_” + name of respective
bit in R31
LABEL
Indicates that the chip started from the
OFF state.
(Rising Edge triggered)
Note: This bit is cleared once read.
Indicated the chip started up from the
hibernate state.
(Rising Edge triggered)
Note: This bit is cleared once read.
Indicates the wakeup was caused by a
converter fault leading to the chip being
reset.
(Rising Edge triggered)
Note: This bit is cleared once read.
Indicates the wakeup was caused by a
watchdog heartbeat being missed, and
hence the chip being reset.
(Rising Edge triggered)
Note: This bit is cleared once read.
has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
ON key has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R39 enables or masks the
corresponding bit in R31. The default
value for these bits is 0 (unmasked).
PWR_ON (Alternate GPIO function) pin
WAKEUP (Alternate GPIO function) pin
DESCRIPTION
PD, March 2010, Rev 4.2
WM8351
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