ASD5020L640INT Arctic Silicon Devices, ASD5020L640INT Datasheet - Page 29

• Manufacturer Part Number: ASD5020L640INT
• Description: ADC (A/D Converters) Mul-Md 12bit/640MSPS 8-bit 1000 MSPS ADC
• Manufacturer: Arctic Silicon Devices

Specifications of ASD5020L640INT

• Number Of Converters: 1
• Number Of Adc Inputs: 2
• Conversion Rate: 640 MSPs
• Resolution: 12 bit
• Snr: 70 dB
• Voltage Reference: 1 V
• Supply Voltage (max): 2 V
• Supply Voltage (min): 1.7 V
• Maximum Power Dissipation: 490 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-48
• Input Voltage: 1.8 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Preliminary Product Specification
Analog Input Invert
The IPx pin represents the positive analog input pin, and INx represents the negative (complementary) input. Setting the bits marked
invertx_ch<n:1> (individual control for each channel) causes the inputs to be swapped. INx would then represent the positive input,
and IPx the negative input.
LVDS Test Patterns
To ease the LVDS synchronization setup of ASD5020, several test patterns can be set up on the outputs. Normal ADC
data are replaced by the test pattern in these modes. Setting en_ramp to '1' sets up a repeating full-scale ramp pattern
on all data outputs. The ramp starts at code zero and is increased 1LSB every clock cycle. It returns to zero code and
starts the ramp again after reaching the full-scale code.
A constant value can be set up on the outputs by setting single_custom_pat to '1', and programming the desired value in
bits_custom1<15:0>. In this mode, bits_custom1<15:0> replaces the ADC data at the output, and is controlled by LSB-
first and MSB-first modes in the same way as normal ADC data are.
The device may also be set up to alternate between two codes by programming dual_custom_pat to '1'. The two codes
are the contents of bits_custom1<15:0> and bits_custom2<15:0>.
Since bit_custom*<15:0> is a 16 bit word there will be a truncation at the LSB side when using less than 16 bits in the
LVDS output word. If 12-bit output is selected bit <15:4> will be used, if 14-bit output is used bit <15:2> will be used and if
dual 8-bit is selected bit<15:8> will be put on the LVDS 'A' output and bit <7:0> will be put on the LVDS 'B' output.
Two preset patterns can also be selected:
Note: Only one of the above patterns should be selected at the same time.
ASD5020
invert4_ch<4:1>
invert2_ch<2:1>
invert1_ch1
en_ramp
dual_custom_pat
single_custom_pat
bits_custom1
<15:0>
bits_custom2
<15:0>
pat_deskew
pat_sync
1.
2.
Name
Name
Deskew pattern: Set using pat_deskew, this mode replaces the ADC output with a pattern consisting of
alternating zeros and ones - MSB will be a zero. For a 12-bit output the pattern will be: '010101010101'
Sync pattern: Set using pat_sync, the normal ADC word is in this mode replaced by a fixed synchronization
pattern where the output word is split in two and the upper part of the word is ones and the lower part is zeros.
For a 12-bit output the pattern will be: '111111000000' .
Channel specific swapping of the
analog input signal for a Quad
Channel setup.
Channel specific swapping of the
analog input signal for a Dual
Channel setup.
Channel specific swapping of the
analog input signal for a Single
Channel setup.
Enables a repeating full-scale ramp
pattern on the outputs.
Enable the mode wherein the output
toggles between two defined codes.
Enables the mode wherein the output
is a constant specified code.
Bits for the single custom pattern and
for the first code of the dual custom
pattern. <0> is the LSB.
Bits for the second code of the dual
custom pattern.
Enable deskew pattern mode.
Enable sync pattern mode.
Description
Description
IPx is positive input
IPx is positive input
IPx is positive input
rev 2.0, 2010.11.08
Default
Default
Inactive
Inactive
Inactive
Inactive
Inactive
0x0000
0x0000
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D15 D14D13D12D11D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D15 D14D13D12D11D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X
X
X
X
X
X
X
X
X
X
X X X X X X X X X X X
X X X X X X X X X X X
X
X 0 0
0 X 0
0 0 X
X X
X X X X
High Speed Mode
0 X
X 0
Address
Address
0x24
0x25
0x26
0x27
0x45
Hex
Hex