AGLP060V5-CSG289 Actel, AGLP060V5-CSG289 Datasheet - Page 33

FPGA - Field Programmable Gate Array 60K System Gates

AGLP060V5-CSG289

Manufacturer Part Number
AGLP060V5-CSG289
Description
FPGA - Field Programmable Gate Array 60K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLP060V5-CSG289

Processor Series
AGLP060
Core
IP Core
Number Of Macrocells
512
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
4
Data Ram Size
4608 bit
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
60 K
Package / Case
CSP-289
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 2-21 • Summary of Maximum and Minimum DC Input and Output Levels Applicable to Commercial and
I/O Standard
3.3 V LVTTL /
3.3 V LVCMOS
3.3 V LVCMOS
Wide Range
2.5 V LVCMOS 12 mA
1.8 V LVCMOS
1.5 V LVCMOS
1.2 V
LVCMOS
1.2 V LVCMOS
Wide Range
Notes:
1. Currents are measured at 85°C junction temperature.
2. Note that 1.2 V LVCMOS and 3.3 V LVCMOS wide range are applicable to 100 µA drive strength only. The configuration
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.
4. Applicable to IGLOO PLUS V2 devices operating at V
5. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
will not operate at the equivalent software default drive strength. These values are for normal ranges only.
4
Industrial Conditions—Software Default Settings
3
4,5
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Strength
100 µA
100 µA
12 mA
Drive
2 mA
8 mA
4 mA
Software
Strength
Option
Default
Equiv.
12 mA High –0.3
12 mA High –0.3
12 mA High –0.3
Drive
8 mA
4 mA
2 mA
2 mA
2
Slew
Rate
High –0.3 0.35 * VCCI 0.65 * VCCI
High –0.3 0.35 * VCCI 0.65 * VCCI
High –0.3 0.35 * VCCI 0.65 * VCCI
High –0.3 0.3 * VCCI
Min.
V
VIL
Max.
0.8
0.8
0.7
V
CCI
R ev i si o n 1 1
V
CC
0.7 * VCCI
.
Min.
1.7
V
2
2
VIH
Max.
3.6
3.6
3.6
3.6
3.6
3.6
3.6
V
IGLOO PLUS Low Power Flash FPGAs
0.25 * VCCI 0.75 * VCCI
0.25 * VCCI 0.75 * VCCI 2
Max.
VOL
0.45
0.2
0.1
0.4
0.7
V
VCCI – 0.45
VCCI – 0.1 0.1 0.1
VDD 3 0.2 0.1 0.1
VOH
Min.
2.4
1.7
V
I
mA mA
OL
12 12
12 12
8
4
1
I
2- 19
OH
2
8
4
1

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