LFXP2-5E-5TN144I Lattice, LFXP2-5E-5TN144I Datasheet - Page 272

• Manufacturer Part Number: LFXP2-5E-5TN144I
• Description: FPGA - Field Programmable Gate Array 5K LUTs 100 I/O Inst on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-5E-5TN144I

• Number Of Macrocells: 5000
• Number Of Programmable I/os: 100
• Data Ram Size: 169984
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: TQFP-144
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 169984
• Number Of I /o: 100
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Targeting the sysDSP Block Using Simulink
Simulink Overview
Simulink is a graphical add-on (similar to schematic entry) for Matlab
more information, refer to the Simulink web page at www.mathworks.com/products/simulink/.
Why is Simulink used?
• It allows users to create algorithms using floating point numbers.
• It helps users convert floating point algorithms into fixed point algorithms.
How does Simulink fit into the normal ispLEVER design flow?
• Once you have converted have your algorithm working in fixed point. You can use the Lattice ispDSP Block to
What does Lattice provide?
• Lattice provides a library of blocks for the Simulink tool, which include Multipliers, Adders, Registers, and other
create HDL files, which can be instantiated in your HDL design. Currently there is only support for VHDL.
standard building blocks. Besides the basic building blocks there are a couple of unique Lattice blocks:
Gateways In and Out
Everything between Gateways In and Out represents the HDL code. Everything before a Gateway In is the stim-
ulus your test bench. Everything after the Gateway Out are the signals you will be monitoring in the test bench.
Below is an example. The box on the left contains Gateways In’s and the three boxes on the right contain Gate-
way Outs in Figure 13-13.
Generate
The Generate block is used to convert Fixed point Simulink design into HDL files which can be instantiated in a
HDL design. The Generate Block is identified by the Lattice logo and can be seen in Figure 13-13.
13-13
®
, which is produced by The MathWorks. For
Lattice XP2 sysDSP Usage Guide