A3PE1500-PQG208 Actel, A3PE1500-PQG208 Datasheet - Page 149

• Manufacturer Part Number: A3PE1500-PQG208
• Description: FPGA - Field Programmable Gate Array 1500K System Gates
• Manufacturer: Actel

Specifications of A3PE1500-PQG208

• Processor Series: A3PE1500
• Core: IP Core
• Maximum Operating Frequency: 231 MHz
• Number Of Programmable I/os: 147
• Data Ram Size: 276480
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 1.5 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4 – Datasheet Information
List of Changes
Revision
July 2010
Revision 9 (Aug 2009)
Product Brief v1.2
DC
Characteristics v1.3
Revision 8 (Feb 2008)
Product Brief v1.1
Revision 7 (Jun 2008)
DC
Characteristics v1.2
Revision 6 (Jun 2008) The A3PE600
and
and
Switching
Switching
The following table lists critical changes that were made in each revision of the ProASIC3E datasheet.
The versioning system for datasheets has been changed. Datasheets are
assigned a revision number that increments each time the datasheet is revised.
The
device in the device family.
All references to speed grade –F have been removed from this document.
The
definitions of hot-swap and cold-sparing.
3.3 V LVCMOS and 1.2 V LVCMOS Wide Range support was added to the
datasheet. This affects all tables that contained 3.3 V LVCMOS and 1.2 V
LVCMOS data.
I
Maximum DC Input and Output Levels" tables.
–F was removed from the datasheet. The speed grade is no longer supported.
In the
voltage" and note 4 are new.
The
The
table was updated.
There are new parameters and data was updated in the
table.
There are new parameters and data was updated in the
RAM512X18
Table 1-2 • ProASIC3E FPGAs Package Sizes Dimensions
The title of
remove "as measured on quiet I/Os." Table note 2 was revised to remove
"estimated SSO density over cycles." Table note 3 was deleted
Table 2-78 • LVDS Minimum and Maximum DC Input and Output Levels
updated.
were added to the table.
IL
and I
Table 2-4 • Overshoot and Undershoot Limits
"ProASIC3E Device Status" table on page II
Table 2-6 • Temperature and Voltage Derating Factors for Timing Delays
"Pro I/Os with Advanced I/O Standards" section
Table 2-2 • Recommended Operating Conditions
IH
input leakage current information was added to all "Minimum and
Table 2-4 • Overshoot and Undershoot Limits
table.
"484-Pin FBGA"
table was missing G22. The pin and its function
R e v i s i o n 9
Changes
1
indicates the status for each
table was updated.
Table 2-99 • RAM4K9
was revised to add
1
is new.
"3.0 V DC supply
1
.
was modified to
Table 2-100 •
was
Page
2-78
2-79
2-50
3-17
N/A
N/A
N/A
N/A
N/A
1-6
2-2
2-3
2-5
1-II
2-3
4 -1