A3PE1500-PQG208 Actel, A3PE1500-PQG208 Datasheet - Page 150

• Manufacturer Part Number: A3PE1500-PQG208
• Description: FPGA - Field Programmable Gate Array 1500K System Gates
• Manufacturer: Actel

Specifications of A3PE1500-PQG208

• Processor Series: A3PE1500
• Core: IP Core
• Maximum Operating Frequency: 231 MHz
• Number Of Programmable I/os: 147
• Data Ram Size: 276480
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 1.5 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Datasheet Information
4 - 2
Revision
Revision 5 (Jun 2008)
Packaging v1.4
Revision 4 (Apr 2008)
Product Brief v1.0
Packaging v1.3
Revision 3 (Apr 2008)
Packaging v1.2
Revision 2 (Mar 2008)
Product Brief rev. 1
Revision 1 (Feb 2008)
DC
Characteristics v1.1
and
Switching
The
The naming conventions changed for the following pins in the
the A3PE600:
Pin Number
J19
K20
M2
N1
N4
P3
The product brief portion of the datasheet was divided into two sections and given
a version number, starting at v1.0. The first section of the document includes
features, benefits, ordering information, and temperature and speed grade
offerings. The second section is a device family overview.
The following pins had duplicates and the extra pins were deleted from the
Pin PQFP"
36, 62, 171
Note: There were no pin function changes in this update.
The following pins had duplicates and the extra pins were deleted from the
Pin FBGA"
E2, E3, E16, E17, P2, P3, T16, U17
Note: There were no pin function changes in this update.
The
old PAT were based on the IFX die, and this is the final UMC die version.
The
were based on the IFX die, and this is the final UMC die version.
The following pins had duplicates and the extra pins were deleted from the
Pin FBGA"
AD6, AE5, AE28, AF29, F5, F26, G6, G25
Note: There were no pin function changes in this update.
The FG324 package was added to the
"I/Os Per Package1"
A3PE3000.
In
Temperature
110°C to 100°C for both commercial and industrial grades.
The
In the
FCLKIN is the input clock frequency.
In
was incorrect. It previously said T
In
1 are new.
Table 2-103 • JTAG 1532
in the previous version of the document.
Table 2-98 • ProASIC3E CCC/PLL
Table 2-14 • Summary of Maximum and Minimum DC Input
Table 2-3 • Flash Programming Limits – Retention, Storage and Operating
"324-Pin FBGA"
"256-Pin FBGA"
"484-Pin FBGA"
"PLL Behavior at Brownout Condition" section
"PLL Contribution—PPLL"
A3PE3000 table:
table:
table:
1, Maximum Operating Junction Temperature was changed from
package diagram was replaced.
pin table was updated for the A3PE600 device because the
was updated for the A3PE600 device because the old PAT
table, and the
was populated with the parameter data, which was not
New Function Name
IO45PPB2V1
IO45NPB2V1
IO114NPB6V1
IO114PPB6V1
GFC2/IO115PPB6V1
IO115NPB6V1
section, the following was deleted:
J
R e vi s i o n 9
and it was corrected and changed to T
Changes
Specification, the SCLK parameter and note
"Temperature Grade Offerings"
"ProASIC3E Product Family"
is new.
"484-Pin FBGA"
Levels, the note
table, the
table for
A
.
"208-
"324-
"896-
for
I, II,
Page
3-17
3-12
3-12
3-17
3-41
2-11
2-18
2-71
2-84
N/A
3-6
3-9
2-2
2-4
IV