AT32UC3L0-XPLD Atmel, AT32UC3L0-XPLD Datasheet - Page 66

• Manufacturer Part Number: AT32UC3L0-XPLD
• Description: KIT DEV/EVAL FOR AT32UC3L0
• Manufacturer: Atmel

Specifications of AT32UC3L0-XPLD

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 7-39.
Notes:
32099F–11/2010
Symbol
USPI6
USPI7
USPI8
USPI9
USPI10
USPI11
USPI12
USPI13
USPI14
USPI15
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
2. Where:
cess technology. These values are not covered by test limits in production.
USART in SPI mode Timing, Slave Mode
Parameter
SPCK falling to MISO delay
MOSI setup time before SPCK rises
MOSI hold time after SPCK rises
SPCK rising to MISO delay
MOSI setup time before SPCK falls
MOSI hold time after SPCK falls
NSS setup time before SPCK rises
NSS hold time after SPCK falls
NSS setup time before SPCK falls
NSS hold time after SPCK rises
t
SAMPLE
SPCK, CPOL=0
SPCK, CPOL=1
Figure 7-12. USART in SPI Slave Mode NPCS Timing
Maximum SPI Frequency, Slave Input Mode
The maximum SPI slave input frequency is given by the following formula:
Where
on CPOL and NCPHA.
chapter for a description of this clock.
Maximum SPI Frequency, Slave Output Mode
=
t
SPCK
NSS
–
SPIn
⎛
⎝
------------------------------------
2 t
×
is the MOSI setup and hold time, USPI7 + USPI8 or USPI10 + USPI11 depending
t
CLKUSART
SPCK
USPI12
USPI14
f
CLKSPI
+
1
-- -
2
⎞
⎠
(1)
f
×
SPCKMAX
t
CLKUSART
is the maximum frequency of the CLK_SPI. Refer to the SPI
3.0V to 3.6V,
Conditions
V
capacitor =
maximum
VDDIO
external
40pF
=
from
MIN
(
f
---------------------------- -
CLKSPI
t
t
SAMPLE
SAMPLE
9
×
(2)
(2)
AT32UC3L016/32/64
2
25.0
25.0
Min
+ t
+ t
,
0
0
0
0
----------- -
SPIn
CLK_USART
CLK_USART
1
)
USPI13
USPI15
Max
27.6
27.2
Units
ns
66