AT32UC3L0-XPLD Atmel, AT32UC3L0-XPLD Datasheet - Page 69
AT32UC3L0-XPLD
Manufacturer Part Number
AT32UC3L0-XPLD
Description
KIT DEV/EVAL FOR AT32UC3L0
Manufacturer
Atmel
Datasheet
1.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L0-XPLD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 7-41.
Note:
32099F–11/2010
Symbol
SPI6
SPI7
SPI8
SPI9
SPI10
SPI11
SPI12
SPI13
SPI14
SPI15
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
SPI Timing, Slave Mode
Parameter
SPCK falling to MISO delay
MOSI setup time before SPCK rises
MOSI hold time after SPCK rises
SPCK rising to MISO delay
MOSI setup time before SPCK falls
MOSI hold time after SPCK falls
NPCS setup time before SPCK rises
NPCS hold time after SPCK falls
NPCS setup time before SPCK falls
NPCS hold time after SPCK rises
SPCK, CPOL=0
SPCK, CPOL=1
Figure 7-16. SPI Slave Mode With (CPOL= NCPHA= 0) or (CPOL= NCPHA= 1)
Figure 7-17.
Maximum SPI Frequency, Slave Input Mode
NPCS
SPCK
MISO
MOSI
(1)
SPI12
SPI14
SPI Slave Mode NPCS Timing
SPI9
SPI10
SPI11
3.0V to 3.6V,
Conditions
V
capacitor =
maximum
VDDIO
external
40pF
from
AT32UC3L016/32/64
49.4
48.8
Min
4.1
3.5
4.9
2.7
3.8
3.2
SPI13
SPI15
Max
79.9
80.8
Units
ns
69
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